4cc1c64646
Turns out the C version of the cubic resampler is just slightly faster than even the SSE3 version of the FIR4 resampler. This is likely due to not using a 64KB random-access lookup table along with unaligned loads, both offseting the gains from SSE.
262 lines
8.9 KiB
C
262 lines
8.9 KiB
C
#include "config.h"
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#include <arm_neon.h>
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#include "AL/al.h"
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#include "AL/alc.h"
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#include "alMain.h"
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#include "alu.h"
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#include "hrtf.h"
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#include "mixer_defs.h"
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const ALfloat *Resample_lerp_Neon(const InterpState* UNUSED(state),
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const ALfloat *restrict src, ALsizei frac, ALint increment,
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ALfloat *restrict dst, ALsizei numsamples)
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{
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const int32x4_t increment4 = vdupq_n_s32(increment*4);
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const float32x4_t fracOne4 = vdupq_n_f32(1.0f/FRACTIONONE);
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const int32x4_t fracMask4 = vdupq_n_s32(FRACTIONMASK);
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alignas(16) ALint pos_[4];
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alignas(16) ALsizei frac_[4];
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int32x4_t pos4;
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int32x4_t frac4;
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ALsizei i;
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InitiatePositionArrays(frac, increment, frac_, pos_, 4);
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frac4 = vld1q_s32(frac_);
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pos4 = vld1q_s32(pos_);
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for(i = 0;numsamples-i > 3;i += 4)
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{
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const float32x4_t val1 = (float32x4_t){src[pos_[0]], src[pos_[1]], src[pos_[2]], src[pos_[3]]};
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const float32x4_t val2 = (float32x4_t){src[pos_[0]+1], src[pos_[1]+1], src[pos_[2]+1], src[pos_[3]+1]};
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/* val1 + (val2-val1)*mu */
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const float32x4_t r0 = vsubq_f32(val2, val1);
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const float32x4_t mu = vmulq_f32(vcvtq_f32_s32(frac4), fracOne4);
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const float32x4_t out = vmlaq_f32(val1, mu, r0);
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vst1q_f32(&dst[i], out);
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frac4 = vaddq_s32(frac4, increment4);
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pos4 = vaddq_s32(pos4, vshrq_n_s32(frac4, FRACTIONBITS));
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frac4 = vandq_s32(frac4, fracMask4);
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vst1q_s32(pos_, pos4);
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}
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if(i < numsamples)
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{
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/* NOTE: These four elements represent the position *after* the last
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* four samples, so the lowest element is the next position to
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* resample.
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*/
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ALint pos = pos_[0];
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frac = vgetq_lane_s32(frac4, 0);
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do {
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dst[i] = lerp(src[pos], src[pos+1], frac * (1.0f/FRACTIONONE));
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frac += increment;
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pos += frac>>FRACTIONBITS;
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frac &= FRACTIONMASK;
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} while(++i < numsamples);
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}
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return dst;
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}
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const ALfloat *Resample_bsinc_Neon(const InterpState *state,
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const ALfloat *restrict src, ALsizei frac, ALint increment,
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ALfloat *restrict dst, ALsizei dstlen)
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{
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const ALfloat *const filter = state->bsinc.filter;
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const float32x4_t sf4 = vdupq_n_f32(state->bsinc.sf);
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const ALsizei m = state->bsinc.m;
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const float32x4_t *fil, *scd, *phd, *spd;
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ALsizei pi, i, j, offset;
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float32x4_t r4;
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ALfloat pf;
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src += state->bsinc.l;
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for(i = 0;i < dstlen;i++)
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{
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// Calculate the phase index and factor.
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#define FRAC_PHASE_BITDIFF (FRACTIONBITS-BSINC_PHASE_BITS)
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pi = frac >> FRAC_PHASE_BITDIFF;
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pf = (frac & ((1<<FRAC_PHASE_BITDIFF)-1)) * (1.0f/(1<<FRAC_PHASE_BITDIFF));
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#undef FRAC_PHASE_BITDIFF
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offset = m*pi*4;
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fil = ASSUME_ALIGNED(filter + offset, 16); offset += m;
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scd = ASSUME_ALIGNED(filter + offset, 16); offset += m;
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phd = ASSUME_ALIGNED(filter + offset, 16); offset += m;
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spd = ASSUME_ALIGNED(filter + offset, 16);
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// Apply the scale and phase interpolated filter.
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r4 = vdupq_n_f32(0.0f);
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{
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const float32x4_t pf4 = vdupq_n_f32(pf);
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for(j = 0;j < m;j+=4,fil++,scd++,phd++,spd++)
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{
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/* f = ((fil + sf*scd) + pf*(phd + sf*spd)) */
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const float32x4_t f4 = vmlaq_f32(
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vmlaq_f32(*fil, sf4, *scd),
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pf4, vmlaq_f32(*phd, sf4, *spd)
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);
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/* r += f*src */
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r4 = vmlaq_f32(r4, f4, vld1q_f32(&src[j]));
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}
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}
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r4 = vaddq_f32(r4, vcombine_f32(vrev64_f32(vget_high_f32(r4)),
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vrev64_f32(vget_low_f32(r4))));
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dst[i] = vget_lane_f32(vadd_f32(vget_low_f32(r4), vget_high_f32(r4)), 0);
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frac += increment;
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src += frac>>FRACTIONBITS;
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frac &= FRACTIONMASK;
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}
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return dst;
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}
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static inline void ApplyCoeffs(ALsizei Offset, ALfloat (*restrict Values)[2],
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const ALsizei IrSize,
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const ALfloat (*restrict Coeffs)[2],
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ALfloat left, ALfloat right)
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{
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ALsizei c;
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float32x4_t leftright4;
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{
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float32x2_t leftright2 = vdup_n_f32(0.0);
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leftright2 = vset_lane_f32(left, leftright2, 0);
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leftright2 = vset_lane_f32(right, leftright2, 1);
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leftright4 = vcombine_f32(leftright2, leftright2);
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}
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Values = ASSUME_ALIGNED(Values, 16);
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Coeffs = ASSUME_ALIGNED(Coeffs, 16);
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for(c = 0;c < IrSize;c += 2)
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{
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const ALsizei o0 = (Offset+c)&HRIR_MASK;
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const ALsizei o1 = (o0+1)&HRIR_MASK;
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float32x4_t vals = vcombine_f32(vld1_f32((float32_t*)&Values[o0][0]),
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vld1_f32((float32_t*)&Values[o1][0]));
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float32x4_t coefs = vld1q_f32((float32_t*)&Coeffs[c][0]);
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vals = vmlaq_f32(vals, coefs, leftright4);
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vst1_f32((float32_t*)&Values[o0][0], vget_low_f32(vals));
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vst1_f32((float32_t*)&Values[o1][0], vget_high_f32(vals));
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}
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}
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#define MixHrtf MixHrtf_Neon
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#define MixHrtfBlend MixHrtfBlend_Neon
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#define MixDirectHrtf MixDirectHrtf_Neon
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#include "mixer_inc.c"
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#undef MixHrtf
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void Mix_Neon(const ALfloat *data, ALsizei OutChans, ALfloat (*restrict OutBuffer)[BUFFERSIZE],
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ALfloat *CurrentGains, const ALfloat *TargetGains, ALsizei Counter, ALsizei OutPos,
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ALsizei BufferSize)
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{
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ALfloat gain, delta, step;
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float32x4_t gain4;
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ALsizei c;
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data = ASSUME_ALIGNED(data, 16);
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OutBuffer = ASSUME_ALIGNED(OutBuffer, 16);
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delta = (Counter > 0) ? 1.0f/(ALfloat)Counter : 0.0f;
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for(c = 0;c < OutChans;c++)
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{
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ALsizei pos = 0;
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gain = CurrentGains[c];
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step = (TargetGains[c] - gain) * delta;
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if(fabsf(step) > FLT_EPSILON)
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{
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ALsizei minsize = mini(BufferSize, Counter);
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/* Mix with applying gain steps in aligned multiples of 4. */
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if(minsize-pos > 3)
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{
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float32x4_t step4;
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gain4 = vsetq_lane_f32(gain, gain4, 0);
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gain4 = vsetq_lane_f32(gain + step, gain4, 1);
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gain4 = vsetq_lane_f32(gain + step + step, gain4, 2);
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gain4 = vsetq_lane_f32(gain + step + step + step, gain4, 3);
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step4 = vdupq_n_f32(step + step + step + step);
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do {
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const float32x4_t val4 = vld1q_f32(&data[pos]);
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float32x4_t dry4 = vld1q_f32(&OutBuffer[c][OutPos+pos]);
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dry4 = vmlaq_f32(dry4, val4, gain4);
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gain4 = vaddq_f32(gain4, step4);
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vst1q_f32(&OutBuffer[c][OutPos+pos], dry4);
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pos += 4;
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} while(minsize-pos > 3);
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/* NOTE: gain4 now represents the next four gains after the
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* last four mixed samples, so the lowest element represents
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* the next gain to apply.
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*/
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gain = vgetq_lane_f32(gain4, 0);
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}
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/* Mix with applying left over gain steps that aren't aligned multiples of 4. */
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for(;pos < minsize;pos++)
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{
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OutBuffer[c][OutPos+pos] += data[pos]*gain;
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gain += step;
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}
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if(pos == Counter)
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gain = TargetGains[c];
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CurrentGains[c] = gain;
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/* Mix until pos is aligned with 4 or the mix is done. */
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minsize = mini(BufferSize, (pos+3)&~3);
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for(;pos < minsize;pos++)
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OutBuffer[c][OutPos+pos] += data[pos]*gain;
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}
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if(!(fabsf(gain) > GAIN_SILENCE_THRESHOLD))
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continue;
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gain4 = vdupq_n_f32(gain);
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for(;BufferSize-pos > 3;pos += 4)
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{
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const float32x4_t val4 = vld1q_f32(&data[pos]);
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float32x4_t dry4 = vld1q_f32(&OutBuffer[c][OutPos+pos]);
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dry4 = vmlaq_f32(dry4, val4, gain4);
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vst1q_f32(&OutBuffer[c][OutPos+pos], dry4);
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}
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for(;pos < BufferSize;pos++)
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OutBuffer[c][OutPos+pos] += data[pos]*gain;
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}
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}
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void MixRow_Neon(ALfloat *OutBuffer, const ALfloat *Gains, const ALfloat (*restrict data)[BUFFERSIZE], ALsizei InChans, ALsizei InPos, ALsizei BufferSize)
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{
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float32x4_t gain4;
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ALsizei c;
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data = ASSUME_ALIGNED(data, 16);
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OutBuffer = ASSUME_ALIGNED(OutBuffer, 16);
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for(c = 0;c < InChans;c++)
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{
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ALsizei pos = 0;
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ALfloat gain = Gains[c];
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if(!(fabsf(gain) > GAIN_SILENCE_THRESHOLD))
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continue;
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gain4 = vdupq_n_f32(gain);
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for(;BufferSize-pos > 3;pos += 4)
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{
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const float32x4_t val4 = vld1q_f32(&data[c][InPos+pos]);
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float32x4_t dry4 = vld1q_f32(&OutBuffer[pos]);
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dry4 = vmlaq_f32(dry4, val4, gain4);
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vst1q_f32(&OutBuffer[pos], dry4);
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}
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for(;pos < BufferSize;pos++)
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OutBuffer[pos] += data[c][InPos+pos]*gain;
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}
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}
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