mirror of
https://github.com/microsoft/DirectXMath
synced 2024-11-25 21:40:06 +00:00
94 lines
2.4 KiB
C++
94 lines
2.4 KiB
C++
//-------------------------------------------------------------------------------------
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// DirectXMathBE.h -- Big-endian swap extensions for SIMD C++ Math library
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//
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// Copyright (c) Microsoft Corporation. All rights reserved.
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// Licensed under the MIT License.
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//
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// http://go.microsoft.com/fwlink/?LinkID=615560
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//-------------------------------------------------------------------------------------
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#ifdef _MSC_VER
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#pragma once
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#endif
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#pragma warning(push)
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#pragma warning(disable : 4987)
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#include <intrin.h>
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#pragma warning(pop)
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#ifndef _M_ARM
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#include <tmmintrin.h>
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#endif
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#include <DirectXMath.h>
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namespace DirectX
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{
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inline XMVECTOR XM_CALLCONV XMVectorEndian
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(
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FXMVECTOR V
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)
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{
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#if defined(_XM_ARM_NEON_INTRINSICS_) && !defined(_XM_NO_INTRINSICS_)
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static const XMVECTORU32 idx = { 0x00010203, 0x04050607, 0x08090A0B, 0x0C0D0E0F };
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int8x8x2_t tbl;
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tbl.val[0] = vget_low_f32(V);
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tbl.val[1] = vget_high_f32(V);
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const __n64 rL = vtbl2_u8( tbl, vget_low_f32(idx) );
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const __n64 rH = vtbl2_u8( tbl, vget_high_f32(idx) );
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return vcombine_f32( rL, rH );
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#else
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XMVECTORU32 E;
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E.v = V;
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uint32_t value = E.u[0];
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E.u[0] = ( (value << 24) | ((value & 0xFF00) << 8) | ((value & 0xFF0000) >> 8) | (value >> 24) );
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value = E.u[1];
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E.u[1] = ( (value << 24) | ((value & 0xFF00) << 8) | ((value & 0xFF0000) >> 8) | (value >> 24) );
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value = E.u[2];
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E.u[2] = ( (value << 24) | ((value & 0xFF00) << 8) | ((value & 0xFF0000) >> 8) | (value >> 24) );
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value = E.u[3];
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E.u[3] = ( (value << 24) | ((value & 0xFF00) << 8) | ((value & 0xFF0000) >> 8) | (value >> 24) );
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return E.v;
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#endif
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}
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#ifndef _M_ARM
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namespace SSSE3
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{
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inline bool XMVerifySSSE3Support()
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{
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// Should return true on AMD Bulldozer, Intel Core i7/i5/i3, Intel Atom, or later processors
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// See http://msdn.microsoft.com/en-us/library/hskdteyh.aspx
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int CPUInfo[4] = {-1};
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__cpuid( CPUInfo, 0 );
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if ( CPUInfo[0] < 1 )
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return false;
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__cpuid(CPUInfo, 1 );
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// Check for SSSE3 instruction set.
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return ( (CPUInfo[2] & 0x200) != 0 );
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}
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inline XMVECTOR XM_CALLCONV XMVectorEndian
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(
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FXMVECTOR V
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)
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{
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static const XMVECTORU32 idx = { 0x00010203, 0x04050607, 0x08090A0B, 0x0C0D0E0F };
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__m128i Result = _mm_shuffle_epi8( _mm_castps_si128(V), idx );
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return _mm_castsi128_ps( Result );
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}
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} // namespace SSSE3
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#endif // !_M_ARM
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} // namespace DirectX;
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