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AuroraMiddleware
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SPIRV-Cross-Vulnerable
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41197bbd30
SPIRV-Cross-Vulnerable
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shaders-hlsl-no-opt
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asm
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Hans-Kristian Arntzen
ec42cb1c41
Roll deps.
2024-01-05 13:36:34 +01:00
..
comp
Roll deps.
2024-01-05 13:36:34 +01:00
frag
Add test for sample mask bulk load/store.
2023-10-23 12:45:08 +02:00
mesh
Add test for plain variable mesh position.
2023-07-03 14:25:22 +02:00
vert
More robust handling of initialized output builtin variables.
2021-01-04 19:12:43 +01:00
temporary.zero-initialize.asm.frag
Add support for forcefully zero-initialized variables.
2020-03-26 13:38:27 +01:00