AuroraMiddleware/SPIRV-Cross
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SPIRV-Cross/reference/shaders/asm/comp/bitcast_iequal.asm.comp

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Implement more correct integer op handling. In some cases we need to bitcast when dealing with int vs. uint. SPIR-V allows inputs to be of different integer signedness, so we need to deal with this somehow. Add testing system to test SPIR-V assembly. For now, test all possible combination for all major cases. - IAdd (which doesn't care about input type as long as they're equal) - SDiv/UDiv operations which case about input type. - Arith/Logical right shifts. - IEqual to test outputs to bvec, which shouldn't get output cast. Also tests casting in function-like calls.
2016-05-10 21:39:41 +00:00
#version 310 es
layout(local_size_x = 1, local_size_y = 1, local_size_z = 1) in;
Add SPVASM test from clspv.
2017-09-29 10:20:57 +00:00
layout(binding = 0, std430) buffer _3_5
Implement more correct integer op handling. In some cases we need to bitcast when dealing with int vs. uint. SPIR-V allows inputs to be of different integer signedness, so we need to deal with this somehow. Add testing system to test SPIR-V assembly. For now, test all possible combination for all major cases. - IAdd (which doesn't care about input type as long as they're equal) - SDiv/UDiv operations which case about input type. - Arith/Logical right shifts. - IEqual to test outputs to bvec, which shouldn't get output cast. Also tests casting in function-like calls.
2016-05-10 21:39:41 +00:00
{
Update test files.
2017-07-29 19:47:28 +00:00
ivec4 _m0;
uvec4 _m1;
Implement more correct integer op handling. In some cases we need to bitcast when dealing with int vs. uint. SPIR-V allows inputs to be of different integer signedness, so we need to deal with this somehow. Add testing system to test SPIR-V assembly. For now, test all possible combination for all major cases. - IAdd (which doesn't care about input type as long as they're equal) - SDiv/UDiv operations which case about input type. - Arith/Logical right shifts. - IEqual to test outputs to bvec, which shouldn't get output cast. Also tests casting in function-like calls.
2016-05-10 21:39:41 +00:00
} _5;
Add SPVASM test from clspv.
2017-09-29 10:20:57 +00:00
layout(binding = 1, std430) buffer _4_6
Implement more correct integer op handling. In some cases we need to bitcast when dealing with int vs. uint. SPIR-V allows inputs to be of different integer signedness, so we need to deal with this somehow. Add testing system to test SPIR-V assembly. For now, test all possible combination for all major cases. - IAdd (which doesn't care about input type as long as they're equal) - SDiv/UDiv operations which case about input type. - Arith/Logical right shifts. - IEqual to test outputs to bvec, which shouldn't get output cast. Also tests casting in function-like calls.
2016-05-10 21:39:41 +00:00
{
Update test files.
2017-07-29 19:47:28 +00:00
uvec4 _m0;
ivec4 _m1;
Implement more correct integer op handling. In some cases we need to bitcast when dealing with int vs. uint. SPIR-V allows inputs to be of different integer signedness, so we need to deal with this somehow. Add testing system to test SPIR-V assembly. For now, test all possible combination for all major cases. - IAdd (which doesn't care about input type as long as they're equal) - SDiv/UDiv operations which case about input type. - Arith/Logical right shifts. - IEqual to test outputs to bvec, which shouldn't get output cast. Also tests casting in function-like calls.
2016-05-10 21:39:41 +00:00
} _6;
void main()
{
Expand the implementation of inherit_expression_dependencies.
2018-03-09 12:21:38 +00:00
ivec4 _30 = _5._m0;
uvec4 _31 = _5._m1;
bvec4 _34 = equal(ivec4(_31), _30);
bvec4 _35 = equal(_30, ivec4(_31));
bvec4 _36 = equal(_31, _31);
bvec4 _37 = equal(_30, _30);
Update test files.
2017-07-29 19:47:28 +00:00
_6._m0 = mix(uvec4(0u), uvec4(1u), _34);
_6._m0 = mix(uvec4(0u), uvec4(1u), _35);
_6._m0 = mix(uvec4(0u), uvec4(1u), _36);
_6._m0 = mix(uvec4(0u), uvec4(1u), _37);
_6._m1 = mix(ivec4(0), ivec4(1), _34);
_6._m1 = mix(ivec4(0), ivec4(1), _35);
_6._m1 = mix(ivec4(0), ivec4(1), _36);
_6._m1 = mix(ivec4(0), ivec4(1), _37);
Implement more correct integer op handling. In some cases we need to bitcast when dealing with int vs. uint. SPIR-V allows inputs to be of different integer signedness, so we need to deal with this somehow. Add testing system to test SPIR-V assembly. For now, test all possible combination for all major cases. - IAdd (which doesn't care about input type as long as they're equal) - SDiv/UDiv operations which case about input type. - Arith/Logical right shifts. - IEqual to test outputs to bvec, which shouldn't get output cast. Also tests casting in function-like calls.
2016-05-10 21:39:41 +00:00
}
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