AuroraMiddleware/SPIRV-Cross
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Merge pull request #2141 from KhronosGroup/ci-update

Browse Source 
Update Ubuntu version in CI.
This commit is contained in:
Hans-Kristian Arntzen 2023-04-27 17:40:47 +02:00 committed by GitHub
commit 4faeb81f3f
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 79 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
.github/workflows/main.yml vendored
View File

@ -14,7 +14,7 @@ jobs:
name: "Build ${{ matrix.platform }}"
strategy:
matrix:
platform: [windows-latest, ubuntu-18.04, ubuntu-20.04, macos-latest]
platform: [windows-latest, ubuntu-20.04, ubuntu-22.04, macos-latest]
env:
PARALLEL: -j 2

26
reference/shaders-hlsl-no-opt/asm/frag/vec4-straddle-packing-holes.asm.frag Normal file
View File

@ -0,0 +1,26 @@
cbuffer type_Test : register(b0)
{
float3 Test_V0_xyz_ : packoffset(c0);
float2 Test_V1_zw : packoffset(c1.z);
};
static float4 out_var_SV_Target;
struct SPIRV_Cross_Output
{
float4 out_var_SV_Target : SV_Target0;
};
void frag_main()
{
out_var_SV_Target = float4(Test_V0_xyz_, Test_V1_zw.x);
}
SPIRV_Cross_Output main()
{
frag_main();
SPIRV_Cross_Output stage_output;
stage_output.out_var_SV_Target = out_var_SV_Target;
return stage_output;
}

52
shaders-hlsl-no-opt/asm/frag/vec4-straddle-packing-holes.asm.frag Normal file
View File

@ -0,0 +1,52 @@
; SPIR-V
; Version: 1.0
; Generator: Google spiregg; 0
; Bound: 29
; Schema: 0
OpCapability Shader
OpMemoryModel Logical GLSL450
OpEntryPoint Fragment %PSMain "main" %out_var_SV_Target
OpExecutionMode %PSMain OriginUpperLeft
OpSource HLSL 600
OpName %type_Test "type.Test"
OpMemberName %type_Test 0 "V0_xyz_"
OpMemberName %type_Test 1 "V1___zw"
OpName %Test "Test"
OpName %out_var_SV_Target "out.var.SV_Target"
OpName %PSMain "PSMain"
OpDecorate %out_var_SV_Target Location 0
OpDecorate %Test DescriptorSet 0
OpDecorate %Test Binding 0
OpMemberDecorate %type_Test 0 Offset 0
OpMemberDecorate %type_Test 1 Offset 24
OpDecorate %type_Test Block
%int = OpTypeInt 32 1
%int_0 = OpConstant %int 0
%float = OpTypeFloat 32
%v3float = OpTypeVector %float 3
%v2float = OpTypeVector %float 2
%type_Test = OpTypeStruct %v3float %v2float
%_ptr_Uniform_type_Test = OpTypePointer Uniform %type_Test
%v4float = OpTypeVector %float 4
%_ptr_Output_v4float = OpTypePointer Output %v4float
%void = OpTypeVoid
%15 = OpTypeFunction %void
%_ptr_Uniform_v3float = OpTypePointer Uniform %v3float
%_ptr_Uniform_float = OpTypePointer Uniform %float
%Test = OpVariable %_ptr_Uniform_type_Test Uniform
%out_var_SV_Target = OpVariable %_ptr_Output_v4float Output
%uint = OpTypeInt 32 0
%uint_1 = OpConstant %uint 1
%PSMain = OpFunction %void None %15
%18 = OpLabel
%19 = OpAccessChain %_ptr_Uniform_v3float %Test %int_0
%20 = OpLoad %v3float %19
%21 = OpAccessChain %_ptr_Uniform_float %Test %uint_1 %int_0
%22 = OpLoad %float %21
%23 = OpCompositeExtract %float %20 0
%24 = OpCompositeExtract %float %20 1
%25 = OpCompositeExtract %float %20 2
%26 = OpCompositeConstruct %v4float %23 %24 %25 %22
OpStore %out_var_SV_Target %26
OpReturn
OpFunctionEnd