Merge pull request #1996 from KhronosGroup/fix-1993
MSL: Fix various bugs with Ptr/U bitcasts.
This commit is contained in:
commit
61c603f3ba
@ -18,10 +18,10 @@ struct SSBO
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kernel void main0(constant UBO& _10 [[buffer(0)]])
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{
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((device SSBO*)as_type<uint64_t>(_10.b))->a1 = float3(1.0, 2.0, 3.0);
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uint2 _35 = as_type<uint2>((uint64_t)((device SSBO*)as_type<uint64_t>(_10.b + uint2(32u))));
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(reinterpret_cast<device SSBO*>(as_type<ulong>(_10.b)))->a1 = float3(1.0, 2.0, 3.0);
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uint2 _35 = as_type<uint2>(reinterpret_cast<ulong>(reinterpret_cast<device SSBO*>(as_type<ulong>(_10.b + uint2(32u)))));
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uint2 v2 = _35;
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device SSBO* _39 = ((device SSBO*)as_type<uint64_t>(_35));
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device SSBO* _39 = reinterpret_cast<device SSBO*>(as_type<ulong>(_35));
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float3 v3 = float3(_39->a1);
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_39->a1 = float3(_39->a1) + float3(1.0);
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}
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@ -0,0 +1,33 @@
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#include <metal_stdlib>
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#include <simd/simd.h>
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using namespace metal;
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struct SomeBuffer;
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struct SomeBuffer
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{
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float4 v;
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ulong a;
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uint2 b;
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};
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struct Registers
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{
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ulong address;
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uint2 address2;
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};
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kernel void main0(constant Registers& registers [[buffer(0)]])
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{
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device SomeBuffer* _44 = reinterpret_cast<device SomeBuffer*>(registers.address);
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device SomeBuffer* _45 = reinterpret_cast<device SomeBuffer*>(registers.address);
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device SomeBuffer* _46 = reinterpret_cast<device SomeBuffer*>(as_type<ulong>(registers.address2));
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_44->v = float4(1.0, 2.0, 3.0, 4.0);
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_45->v = float4(1.0, 2.0, 3.0, 4.0);
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_46->v = float4(1.0, 2.0, 3.0, 4.0);
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_44->a = reinterpret_cast<ulong>(_44);
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_45->a = reinterpret_cast<ulong>(_45);
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_46->b = as_type<uint2>(reinterpret_cast<ulong>(_46));
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}
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@ -18,9 +18,9 @@ struct SSBO
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kernel void main0(constant UBO& _10 [[buffer(0)]])
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{
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((device SSBO*)as_type<uint64_t>(_10.b))->a1 = float3(1.0, 2.0, 3.0);
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uint2 v2 = as_type<uint2>((uint64_t)((device SSBO*)as_type<uint64_t>(_10.b + uint2(32u))));
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float3 v3 = float3(((device SSBO*)as_type<uint64_t>(v2))->a1);
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((device SSBO*)as_type<uint64_t>(v2))->a1 = v3 + float3(1.0);
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(reinterpret_cast<device SSBO*>(as_type<ulong>(_10.b)))->a1 = float3(1.0, 2.0, 3.0);
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uint2 v2 = as_type<uint2>(reinterpret_cast<ulong>(reinterpret_cast<device SSBO*>(as_type<ulong>(_10.b + uint2(32u)))));
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float3 v3 = float3((reinterpret_cast<device SSBO*>(as_type<ulong>(v2)))->a1);
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(reinterpret_cast<device SSBO*>(as_type<ulong>(v2)))->a1 = v3 + float3(1.0);
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}
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@ -0,0 +1,37 @@
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#version 450
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#if defined(GL_ARB_gpu_shader_int64)
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#extension GL_ARB_gpu_shader_int64 : require
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#else
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#error No extension available for 64-bit integers.
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#endif
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#extension GL_EXT_buffer_reference : require
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#extension GL_EXT_buffer_reference_uvec2 : require
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layout(local_size_x = 1, local_size_y = 1, local_size_z = 1) in;
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layout(buffer_reference) buffer SomeBuffer;
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layout(buffer_reference, buffer_reference_align = 16, std430) buffer SomeBuffer
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{
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vec4 v;
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uint64_t a;
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uvec2 b;
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};
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layout(push_constant, std430) uniform Registers
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{
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uint64_t address;
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uvec2 address2;
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} registers;
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void main()
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{
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SomeBuffer _44 = SomeBuffer(registers.address);
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SomeBuffer _45 = SomeBuffer(registers.address);
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SomeBuffer _46 = SomeBuffer(registers.address2);
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_44.v = vec4(1.0, 2.0, 3.0, 4.0);
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_45.v = vec4(1.0, 2.0, 3.0, 4.0);
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_46.v = vec4(1.0, 2.0, 3.0, 4.0);
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_44.a = uint64_t(_44);
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_45.a = uint64_t(_45);
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_46.b = uvec2(_46);
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}
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@ -0,0 +1,106 @@
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; SPIR-V
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; Version: 1.0
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; Generator: Khronos Glslang Reference Front End; 10
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; Bound: 62
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; Schema: 0
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OpCapability Shader
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OpCapability Int64
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OpCapability PhysicalStorageBufferAddresses
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OpExtension "SPV_KHR_physical_storage_buffer"
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%1 = OpExtInstImport "GLSL.std.450"
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OpMemoryModel PhysicalStorageBuffer64 GLSL450
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OpEntryPoint GLCompute %main "main"
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OpExecutionMode %main LocalSize 1 1 1
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OpSource GLSL 450
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OpSourceExtension "GL_ARB_gpu_shader_int64"
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OpSourceExtension "GL_EXT_buffer_reference"
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OpSourceExtension "GL_EXT_buffer_reference_uvec2"
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OpName %main "main"
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OpName %SomeBuffer "SomeBuffer"
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OpMemberName %SomeBuffer 0 "v"
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OpMemberName %SomeBuffer 1 "a"
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OpMemberName %SomeBuffer 2 "b"
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OpName %Registers "Registers"
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OpMemberName %Registers 0 "address"
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OpMemberName %Registers 1 "address2"
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OpName %registers "registers"
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OpName %a "a"
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OpName %b "b"
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OpMemberDecorate %SomeBuffer 0 Offset 0
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OpMemberDecorate %SomeBuffer 1 Offset 16
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OpMemberDecorate %SomeBuffer 2 Offset 24
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OpDecorate %SomeBuffer Block
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OpMemberDecorate %Registers 0 Offset 0
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OpMemberDecorate %Registers 1 Offset 8
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OpDecorate %Registers Block
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%void = OpTypeVoid
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%3 = OpTypeFunction %void
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OpTypeForwardPointer %_ptr_PhysicalStorageBuffer_SomeBuffer PhysicalStorageBuffer
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%float = OpTypeFloat 32
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%v4float = OpTypeVector %float 4
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%ulong = OpTypeInt 64 0
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%uint = OpTypeInt 32 0
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%v2uint = OpTypeVector %uint 2
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%SomeBuffer = OpTypeStruct %v4float %ulong %v2uint
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%_ptr_PhysicalStorageBuffer_SomeBuffer = OpTypePointer PhysicalStorageBuffer %SomeBuffer
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%_ptr_Function__ptr_PhysicalStorageBuffer_SomeBuffer = OpTypePointer Function %_ptr_PhysicalStorageBuffer_SomeBuffer
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%Registers = OpTypeStruct %ulong %v2uint
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%_ptr_PushConstant_Registers = OpTypePointer PushConstant %Registers
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%registers = OpVariable %_ptr_PushConstant_Registers PushConstant
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%int = OpTypeInt 32 1
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%int_0 = OpConstant %int 0
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%_ptr_PushConstant_ulong = OpTypePointer PushConstant %ulong
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%int_1 = OpConstant %int 1
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%_ptr_PushConstant_v2uint = OpTypePointer PushConstant %v2uint
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%float_1 = OpConstant %float 1
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%float_2 = OpConstant %float 2
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%float_3 = OpConstant %float 3
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%float_4 = OpConstant %float 4
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%35 = OpConstantComposite %v4float %float_1 %float_2 %float_3 %float_4
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%_ptr_PhysicalStorageBuffer_v4float = OpTypePointer PhysicalStorageBuffer %v4float
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%float_5 = OpConstant %float 5
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%float_6 = OpConstant %float 6
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%float_7 = OpConstant %float 7
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%float_8 = OpConstant %float 8
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%43 = OpConstantComposite %v4float %float_5 %float_6 %float_7 %float_8
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%_ptr_Function_ulong = OpTypePointer Function %ulong
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%_ptr_Function_v2uint = OpTypePointer Function %v2uint
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%_ptr_PhysicalStorageBuffer_ulong = OpTypePointer PhysicalStorageBuffer %ulong
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%int_2 = OpConstant %int 2
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%_ptr_PhysicalStorageBuffer_v2uint = OpTypePointer PhysicalStorageBuffer %v2uint
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%main = OpFunction %void None %3
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%5 = OpLabel
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%a = OpVariable %_ptr_Function_ulong Function
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%b = OpVariable %_ptr_Function_v2uint Function
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%21 = OpAccessChain %_ptr_PushConstant_ulong %registers %int_0
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%27 = OpAccessChain %_ptr_PushConstant_v2uint %registers %int_1
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%uint_ptr0 = OpLoad %ulong %21
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%uint_ptr1 = OpLoad %v2uint %27
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; ConvertUToPtr and vice versa do not accept vectors.
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%ulong_ptr0 = OpConvertUToPtr %_ptr_PhysicalStorageBuffer_SomeBuffer %uint_ptr0
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%ulong_ptr1 = OpBitcast %_ptr_PhysicalStorageBuffer_SomeBuffer %uint_ptr0
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%uvec2_ptr0 = OpBitcast %_ptr_PhysicalStorageBuffer_SomeBuffer %uint_ptr1
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%vec4_write0 = OpAccessChain %_ptr_PhysicalStorageBuffer_v4float %ulong_ptr0 %int_0
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%vec4_write1 = OpAccessChain %_ptr_PhysicalStorageBuffer_v4float %ulong_ptr1 %int_0
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%vec4_write2 = OpAccessChain %_ptr_PhysicalStorageBuffer_v4float %uvec2_ptr0 %int_0
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OpStore %vec4_write0 %35 Aligned 16
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OpStore %vec4_write1 %35 Aligned 16
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OpStore %vec4_write2 %35 Aligned 16
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%ulong_from_ptr0 = OpConvertPtrToU %ulong %ulong_ptr0
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%ulong_from_ptr1 = OpBitcast %ulong %ulong_ptr1
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%uvec2_from_ptr0 = OpBitcast %v2uint %uvec2_ptr0
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%ptr0 = OpAccessChain %_ptr_PhysicalStorageBuffer_ulong %ulong_ptr0 %int_1
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%ptr1 = OpAccessChain %_ptr_PhysicalStorageBuffer_ulong %ulong_ptr1 %int_1
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%ptr2 = OpAccessChain %_ptr_PhysicalStorageBuffer_v2uint %uvec2_ptr0 %int_2
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OpStore %ptr0 %ulong_from_ptr0 Aligned 8
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OpStore %ptr1 %ulong_from_ptr1 Aligned 8
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OpStore %ptr2 %uvec2_from_ptr0 Aligned 8
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OpReturn
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OpFunctionEnd
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@ -0,0 +1,106 @@
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; SPIR-V
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; Version: 1.0
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; Generator: Khronos Glslang Reference Front End; 10
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; Bound: 62
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; Schema: 0
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OpCapability Shader
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OpCapability Int64
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OpCapability PhysicalStorageBufferAddresses
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OpExtension "SPV_KHR_physical_storage_buffer"
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%1 = OpExtInstImport "GLSL.std.450"
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OpMemoryModel PhysicalStorageBuffer64 GLSL450
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OpEntryPoint GLCompute %main "main"
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OpExecutionMode %main LocalSize 1 1 1
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OpSource GLSL 450
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OpSourceExtension "GL_ARB_gpu_shader_int64"
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OpSourceExtension "GL_EXT_buffer_reference"
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OpSourceExtension "GL_EXT_buffer_reference_uvec2"
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OpName %main "main"
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OpName %SomeBuffer "SomeBuffer"
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OpMemberName %SomeBuffer 0 "v"
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OpMemberName %SomeBuffer 1 "a"
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OpMemberName %SomeBuffer 2 "b"
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OpName %Registers "Registers"
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OpMemberName %Registers 0 "address"
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OpMemberName %Registers 1 "address2"
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OpName %registers "registers"
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OpName %a "a"
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OpName %b "b"
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OpMemberDecorate %SomeBuffer 0 Offset 0
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OpMemberDecorate %SomeBuffer 1 Offset 16
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OpMemberDecorate %SomeBuffer 2 Offset 24
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OpDecorate %SomeBuffer Block
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OpMemberDecorate %Registers 0 Offset 0
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OpMemberDecorate %Registers 1 Offset 8
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OpDecorate %Registers Block
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%void = OpTypeVoid
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%3 = OpTypeFunction %void
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OpTypeForwardPointer %_ptr_PhysicalStorageBuffer_SomeBuffer PhysicalStorageBuffer
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%float = OpTypeFloat 32
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%v4float = OpTypeVector %float 4
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%ulong = OpTypeInt 64 0
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%uint = OpTypeInt 32 0
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%v2uint = OpTypeVector %uint 2
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%SomeBuffer = OpTypeStruct %v4float %ulong %v2uint
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%_ptr_PhysicalStorageBuffer_SomeBuffer = OpTypePointer PhysicalStorageBuffer %SomeBuffer
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%_ptr_Function__ptr_PhysicalStorageBuffer_SomeBuffer = OpTypePointer Function %_ptr_PhysicalStorageBuffer_SomeBuffer
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%Registers = OpTypeStruct %ulong %v2uint
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%_ptr_PushConstant_Registers = OpTypePointer PushConstant %Registers
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%registers = OpVariable %_ptr_PushConstant_Registers PushConstant
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%int = OpTypeInt 32 1
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%int_0 = OpConstant %int 0
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%_ptr_PushConstant_ulong = OpTypePointer PushConstant %ulong
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%int_1 = OpConstant %int 1
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%_ptr_PushConstant_v2uint = OpTypePointer PushConstant %v2uint
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%float_1 = OpConstant %float 1
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%float_2 = OpConstant %float 2
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%float_3 = OpConstant %float 3
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%float_4 = OpConstant %float 4
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%35 = OpConstantComposite %v4float %float_1 %float_2 %float_3 %float_4
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%_ptr_PhysicalStorageBuffer_v4float = OpTypePointer PhysicalStorageBuffer %v4float
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%float_5 = OpConstant %float 5
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%float_6 = OpConstant %float 6
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%float_7 = OpConstant %float 7
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%float_8 = OpConstant %float 8
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%43 = OpConstantComposite %v4float %float_5 %float_6 %float_7 %float_8
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%_ptr_Function_ulong = OpTypePointer Function %ulong
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%_ptr_Function_v2uint = OpTypePointer Function %v2uint
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%_ptr_PhysicalStorageBuffer_ulong = OpTypePointer PhysicalStorageBuffer %ulong
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%int_2 = OpConstant %int 2
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%_ptr_PhysicalStorageBuffer_v2uint = OpTypePointer PhysicalStorageBuffer %v2uint
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%main = OpFunction %void None %3
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%5 = OpLabel
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%a = OpVariable %_ptr_Function_ulong Function
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%b = OpVariable %_ptr_Function_v2uint Function
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%21 = OpAccessChain %_ptr_PushConstant_ulong %registers %int_0
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%27 = OpAccessChain %_ptr_PushConstant_v2uint %registers %int_1
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%uint_ptr0 = OpLoad %ulong %21
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%uint_ptr1 = OpLoad %v2uint %27
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; ConvertUToPtr and vice versa do not accept vectors.
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%ulong_ptr0 = OpConvertUToPtr %_ptr_PhysicalStorageBuffer_SomeBuffer %uint_ptr0
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%ulong_ptr1 = OpBitcast %_ptr_PhysicalStorageBuffer_SomeBuffer %uint_ptr0
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%uvec2_ptr0 = OpBitcast %_ptr_PhysicalStorageBuffer_SomeBuffer %uint_ptr1
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%vec4_write0 = OpAccessChain %_ptr_PhysicalStorageBuffer_v4float %ulong_ptr0 %int_0
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%vec4_write1 = OpAccessChain %_ptr_PhysicalStorageBuffer_v4float %ulong_ptr1 %int_0
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%vec4_write2 = OpAccessChain %_ptr_PhysicalStorageBuffer_v4float %uvec2_ptr0 %int_0
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OpStore %vec4_write0 %35 Aligned 16
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OpStore %vec4_write1 %35 Aligned 16
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OpStore %vec4_write2 %35 Aligned 16
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%ulong_from_ptr0 = OpConvertPtrToU %ulong %ulong_ptr0
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%ulong_from_ptr1 = OpBitcast %ulong %ulong_ptr1
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%uvec2_from_ptr0 = OpBitcast %v2uint %uvec2_ptr0
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%ptr0 = OpAccessChain %_ptr_PhysicalStorageBuffer_ulong %ulong_ptr0 %int_1
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%ptr1 = OpAccessChain %_ptr_PhysicalStorageBuffer_ulong %ulong_ptr1 %int_1
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%ptr2 = OpAccessChain %_ptr_PhysicalStorageBuffer_v2uint %uvec2_ptr0 %int_2
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OpStore %ptr0 %ulong_from_ptr0 Aligned 8
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OpStore %ptr1 %ulong_from_ptr1 Aligned 8
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OpStore %ptr2 %uvec2_from_ptr0 Aligned 8
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OpReturn
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OpFunctionEnd
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@ -8851,6 +8851,34 @@ void CompilerMSL::emit_instruction(const Instruction &instruction)
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#undef MSL_RAY_QUERY_IS_OP2
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#undef MSL_RAY_QUERY_GET_OP2
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#undef MSL_RAY_QUERY_OP_INNER2
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case OpConvertPtrToU:
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case OpConvertUToPtr:
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case OpBitcast:
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{
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auto &type = get<SPIRType>(ops[0]);
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auto &input_type = expression_type(ops[2]);
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if (opcode != OpBitcast || type.pointer || input_type.pointer)
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{
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string op;
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if (type.vecsize == 1 && input_type.vecsize == 1)
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op = join("reinterpret_cast<", type_to_glsl(type), ">(", to_unpacked_expression(ops[2]), ")");
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else if (input_type.vecsize == 2)
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op = join("reinterpret_cast<", type_to_glsl(type), ">(as_type<ulong>(", to_unpacked_expression(ops[2]), "))");
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else
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op = join("as_type<", type_to_glsl(type), ">(reinterpret_cast<ulong>(", to_unpacked_expression(ops[2]), "))");
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emit_op(ops[0], ops[1], op, should_forward(ops[2]));
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inherit_expression_dependencies(ops[1], ops[2]);
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}
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else
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CompilerGLSL::emit_instruction(instruction);
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break;
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}
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default:
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CompilerGLSL::emit_instruction(instruction);
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break;
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@ -14590,26 +14618,10 @@ string CompilerMSL::bitcast_glsl_op(const SPIRType &out_type, const SPIRType &in
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return type_to_glsl(out_type);
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}
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bool CompilerMSL::emit_complex_bitcast(uint32_t result_type, uint32_t id, uint32_t op0)
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bool CompilerMSL::emit_complex_bitcast(uint32_t, uint32_t, uint32_t)
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{
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auto &out_type = get<SPIRType>(result_type);
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auto &in_type = expression_type(op0);
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bool uvec2_to_ptr = (in_type.basetype == SPIRType::UInt && in_type.vecsize == 2 &&
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out_type.pointer && out_type.storage == StorageClassPhysicalStorageBuffer);
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bool ptr_to_uvec2 = (in_type.pointer && in_type.storage == StorageClassPhysicalStorageBuffer &&
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out_type.basetype == SPIRType::UInt && out_type.vecsize == 2);
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string expr;
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// Casting between uvec2 and buffer storage pointer per GL_EXT_buffer_reference_uvec2
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if (uvec2_to_ptr)
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expr = join("((", type_to_glsl(out_type), ")as_type<uint64_t>(", to_unpacked_expression(op0), "))");
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else if (ptr_to_uvec2)
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expr = join("as_type<", type_to_glsl(out_type), ">((uint64_t)", to_unpacked_expression(op0), ")");
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else
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// This is handled from the outside where we deal with PtrToU/UToPtr and friends.
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return false;
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emit_op(result_type, id, expr, should_forward(op0));
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return true;
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}
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// Returns an MSL string identifying the name of a SPIR-V builtin.
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||||
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