6a614cc7f7
We have been interchanging spv and SPIRV_Cross_ for a while, which causes weirdness since we don't explicitly ban SPIRV_Cross identifiers, as these identifiers are generally used for interface variable workarounds.
106 lines
3.3 KiB
Plaintext
106 lines
3.3 KiB
Plaintext
RWByteAddressBuffer _3 : register(u0);
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uint spvBitfieldInsert(uint Base, uint Insert, uint Offset, uint Count)
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{
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uint Mask = Count == 32 ? 0xffffffff : (((1u << Count) - 1) << (Offset & 31));
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return (Base & ~Mask) | ((Insert << Offset) & Mask);
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}
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uint2 spvBitfieldInsert(uint2 Base, uint2 Insert, uint Offset, uint Count)
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{
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uint Mask = Count == 32 ? 0xffffffff : (((1u << Count) - 1) << (Offset & 31));
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return (Base & ~Mask) | ((Insert << Offset) & Mask);
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}
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uint3 spvBitfieldInsert(uint3 Base, uint3 Insert, uint Offset, uint Count)
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{
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uint Mask = Count == 32 ? 0xffffffff : (((1u << Count) - 1) << (Offset & 31));
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return (Base & ~Mask) | ((Insert << Offset) & Mask);
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}
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uint4 spvBitfieldInsert(uint4 Base, uint4 Insert, uint Offset, uint Count)
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{
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uint Mask = Count == 32 ? 0xffffffff : (((1u << Count) - 1) << (Offset & 31));
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return (Base & ~Mask) | ((Insert << Offset) & Mask);
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}
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uint spvBitfieldUExtract(uint Base, uint Offset, uint Count)
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{
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uint Mask = Count == 32 ? 0xffffffff : ((1 << Count) - 1);
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return (Base >> Offset) & Mask;
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}
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uint2 spvBitfieldUExtract(uint2 Base, uint Offset, uint Count)
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{
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uint Mask = Count == 32 ? 0xffffffff : ((1 << Count) - 1);
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return (Base >> Offset) & Mask;
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}
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uint3 spvBitfieldUExtract(uint3 Base, uint Offset, uint Count)
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{
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uint Mask = Count == 32 ? 0xffffffff : ((1 << Count) - 1);
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return (Base >> Offset) & Mask;
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}
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uint4 spvBitfieldUExtract(uint4 Base, uint Offset, uint Count)
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{
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uint Mask = Count == 32 ? 0xffffffff : ((1 << Count) - 1);
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return (Base >> Offset) & Mask;
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}
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int spvBitfieldSExtract(int Base, int Offset, int Count)
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{
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int Mask = Count == 32 ? -1 : ((1 << Count) - 1);
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int Masked = (Base >> Offset) & Mask;
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int ExtendShift = (32 - Count) & 31;
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return (Masked << ExtendShift) >> ExtendShift;
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}
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int2 spvBitfieldSExtract(int2 Base, int Offset, int Count)
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{
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int Mask = Count == 32 ? -1 : ((1 << Count) - 1);
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int2 Masked = (Base >> Offset) & Mask;
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int ExtendShift = (32 - Count) & 31;
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return (Masked << ExtendShift) >> ExtendShift;
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}
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int3 spvBitfieldSExtract(int3 Base, int Offset, int Count)
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{
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int Mask = Count == 32 ? -1 : ((1 << Count) - 1);
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int3 Masked = (Base >> Offset) & Mask;
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int ExtendShift = (32 - Count) & 31;
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return (Masked << ExtendShift) >> ExtendShift;
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}
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int4 spvBitfieldSExtract(int4 Base, int Offset, int Count)
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{
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int Mask = Count == 32 ? -1 : ((1 << Count) - 1);
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int4 Masked = (Base >> Offset) & Mask;
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int ExtendShift = (32 - Count) & 31;
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return (Masked << ExtendShift) >> ExtendShift;
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}
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void comp_main()
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{
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int4 _19 = int4(_3.Load4(0));
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uint4 _20 = _3.Load4(16);
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_3.Store4(0, uint4(countbits(_19)));
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_3.Store4(16, uint4(countbits(_19)));
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_3.Store4(0, uint4(int4(countbits(_20))));
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_3.Store4(16, countbits(_20));
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_3.Store4(0, uint4(reversebits(_19)));
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_3.Store4(16, reversebits(_20));
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_3.Store4(0, uint4(spvBitfieldSExtract(_19, 1, 11u)));
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_3.Store4(16, spvBitfieldSExtract(_20, 11u, 1));
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_3.Store4(0, uint4(spvBitfieldUExtract(_19, 1, 11u)));
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_3.Store4(16, spvBitfieldUExtract(_20, 11u, 1));
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_3.Store4(0, uint4(int4(spvBitfieldInsert(_19, _19.wzyx, 1, 11u))));
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_3.Store4(16, spvBitfieldInsert(_20, _20.wzyx, 11u, 1));
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}
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[numthreads(1, 1, 1)]
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void main()
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{
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comp_main();
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}
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