SPIRV-Cross/reference/shaders-msl-no-opt/asm
Hans-Kristian Arntzen 23da445bd4 MSL: Emit multiple threadgroup slices for multi-patch.
Multiple patches can run in the same workgroup when using multi-patch
mode, so we need to allocate enough storage to avoid false sharing.
2021-04-19 12:10:49 +02:00
..
comp Check entry point variables in is_hidden_variables. 2021-01-22 13:53:22 +01:00
frag Deal better with CompositeExtract from constant composite. 2021-01-22 12:30:16 +01:00
masking MSL: Emit multiple threadgroup slices for multi-patch. 2021-04-19 12:10:49 +02:00
packing MSL: Do not emit swizzled writes in packing fixups. 2020-07-06 10:03:46 +02:00
tesc MSL: Rewrite how IO blocks are emitted in multi-patch mode. 2021-04-19 12:10:49 +02:00
vert MSL: Deal with pointer-to-pointer qualifier ordering. 2021-02-26 13:37:14 +01:00
temporary.zero-initialize.asm.frag Add support for forcefully zero-initialized variables. 2020-03-26 13:38:27 +01:00