80 lines
1.8 KiB
C++
80 lines
1.8 KiB
C++
/*
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* Copyright 2015-2017 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef SPIRV_CROSS_BARRIER_HPP
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#define SPIRV_CROSS_BARRIER_HPP
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#include <atomic>
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#include <thread>
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namespace spirv_cross
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{
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class Barrier
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{
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public:
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Barrier()
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{
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count.store(0);
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iteration.store(0);
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}
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void set_release_divisor(unsigned divisor)
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{
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this->divisor = divisor;
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}
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static inline void memoryBarrier()
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{
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std::atomic_thread_fence(std::memory_order_seq_cst);
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}
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void reset_counter()
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{
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count.store(0);
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iteration.store(0);
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}
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void wait()
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{
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unsigned target_iteration = iteration.load(std::memory_order_relaxed) + 1;
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// Overflows cleanly.
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unsigned target_count = divisor * target_iteration;
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// Barriers don't enforce memory ordering.
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// Be as relaxed about the barrier as we possibly can!
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unsigned c = count.fetch_add(1u, std::memory_order_relaxed);
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if (c + 1 == target_count)
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{
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iteration.store(target_iteration, std::memory_order_relaxed);
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}
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else
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{
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// If we have more threads than the CPU, don't hog the CPU for very long periods of time.
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while (iteration.load(std::memory_order_relaxed) != target_iteration)
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std::this_thread::yield();
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}
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}
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private:
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unsigned divisor = 1;
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std::atomic<unsigned> count;
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std::atomic<unsigned> iteration;
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};
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}
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#endif
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