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SPIRV-Cross
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48d50fa911
SPIRV-Cross
/
shaders-msl-no-opt
/
asm
History
Hans-Kristian Arntzen
4b9e60273c
Add tests for OpCompositeInsert edge cases.
2022-05-18 16:43:32 +02:00
..
comp
Test aliased names in declared LUTs.
2022-01-18 12:39:16 +01:00
frag
Add tests for OpCompositeInsert edge cases.
2022-05-18 16:43:32 +02:00
masking
MSL: Emit multiple threadgroup slices for multi-patch.
2021-04-19 12:10:49 +02:00
packing
MSL: Support edge case with DX layout in scalar block layout.
2020-04-20 15:29:24 +02:00
tesc
Handle edge cases in OpCopyMemory.
2021-03-08 14:15:27 +01:00
tese
MSL: Improve handling of split tessellation access chains.
2021-05-21 16:32:03 +02:00
vert
MSL: Handle awkward mix and match of Offset / ArrayStride in constants.
2022-03-22 12:25:09 +01:00
temporary.zero-initialize.asm.frag
Add support for forcefully zero-initialized variables.
2020-03-26 13:38:27 +01:00