058f1a0933
This maps them to their MSL equivalents. I've mapped `Coherent` to `volatile` since MSL doesn't have anything weaker than `volatile` but stronger than nothing. As part of this, I had to remove the implicit `volatile` added for atomic operation casts. If the buffer is already `coherent` or `volatile`, then we would add a second `volatile`, which would be redundant. I think this is OK even when the buffer *doesn't* have `coherent`: `T *` is implicitly convertible to `volatile T *`, but not vice-versa. It seems to compile OK at any rate. (Note that the non-`volatile` overloads of the atomic functions documented in the spec aren't present in the MSL 2.2 stdlib headers.) `restrict` is tricky, because in MSL, as in C++, it needs to go *after* the asterisk or ampersand for the pointer type it's modifying. Another issue is that, in the `Simple`, `GLSL450`, and `Vulkan` memory models, `Restrict` is the default (i.e. does not need to be specified); but MSL likely follows the `OpenCL` model where `Aliased` is the default. We probably need to implicitly set either `Restrict` or `Aliased` depending on the module's declared memory model.
71 lines
3.9 KiB
Plaintext
71 lines
3.9 KiB
Plaintext
#pragma clang diagnostic ignored "-Wunused-variable"
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#include <metal_stdlib>
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#include <simd/simd.h>
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#include <metal_atomic>
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using namespace metal;
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struct SSBO
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{
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uint u32;
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int i32;
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};
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kernel void main0(device SSBO& ssbo [[buffer(0)]])
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{
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threadgroup uint shared_u32;
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threadgroup int shared_i32;
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uint _16 = atomic_fetch_add_explicit((device atomic_uint*)&ssbo.u32, 1u, memory_order_relaxed);
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uint _18 = atomic_fetch_or_explicit((device atomic_uint*)&ssbo.u32, 1u, memory_order_relaxed);
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uint _20 = atomic_fetch_xor_explicit((device atomic_uint*)&ssbo.u32, 1u, memory_order_relaxed);
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uint _22 = atomic_fetch_and_explicit((device atomic_uint*)&ssbo.u32, 1u, memory_order_relaxed);
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uint _24 = atomic_fetch_min_explicit((device atomic_uint*)&ssbo.u32, 1u, memory_order_relaxed);
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uint _26 = atomic_fetch_max_explicit((device atomic_uint*)&ssbo.u32, 1u, memory_order_relaxed);
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uint _28 = atomic_exchange_explicit((device atomic_uint*)&ssbo.u32, 1u, memory_order_relaxed);
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uint _32;
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do
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{
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_32 = 10u;
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} while (!atomic_compare_exchange_weak_explicit((device atomic_uint*)&ssbo.u32, &_32, 2u, memory_order_relaxed, memory_order_relaxed) && _32 == 10u);
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int _36 = atomic_fetch_add_explicit((device atomic_int*)&ssbo.i32, 1, memory_order_relaxed);
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int _38 = atomic_fetch_or_explicit((device atomic_int*)&ssbo.i32, 1, memory_order_relaxed);
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int _40 = atomic_fetch_xor_explicit((device atomic_int*)&ssbo.i32, 1, memory_order_relaxed);
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int _42 = atomic_fetch_and_explicit((device atomic_int*)&ssbo.i32, 1, memory_order_relaxed);
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int _44 = atomic_fetch_min_explicit((device atomic_int*)&ssbo.i32, 1, memory_order_relaxed);
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int _46 = atomic_fetch_max_explicit((device atomic_int*)&ssbo.i32, 1, memory_order_relaxed);
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int _48 = atomic_exchange_explicit((device atomic_int*)&ssbo.i32, 1, memory_order_relaxed);
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int _52;
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do
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{
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_52 = 10;
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} while (!atomic_compare_exchange_weak_explicit((device atomic_int*)&ssbo.i32, &_52, 2, memory_order_relaxed, memory_order_relaxed) && _52 == 10);
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shared_u32 = 10u;
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shared_i32 = 10;
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uint _57 = atomic_fetch_add_explicit((threadgroup atomic_uint*)&shared_u32, 1u, memory_order_relaxed);
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uint _58 = atomic_fetch_or_explicit((threadgroup atomic_uint*)&shared_u32, 1u, memory_order_relaxed);
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uint _59 = atomic_fetch_xor_explicit((threadgroup atomic_uint*)&shared_u32, 1u, memory_order_relaxed);
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uint _60 = atomic_fetch_and_explicit((threadgroup atomic_uint*)&shared_u32, 1u, memory_order_relaxed);
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uint _61 = atomic_fetch_min_explicit((threadgroup atomic_uint*)&shared_u32, 1u, memory_order_relaxed);
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uint _62 = atomic_fetch_max_explicit((threadgroup atomic_uint*)&shared_u32, 1u, memory_order_relaxed);
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uint _63 = atomic_exchange_explicit((threadgroup atomic_uint*)&shared_u32, 1u, memory_order_relaxed);
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uint _64;
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do
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{
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_64 = 10u;
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} while (!atomic_compare_exchange_weak_explicit((threadgroup atomic_uint*)&shared_u32, &_64, 2u, memory_order_relaxed, memory_order_relaxed) && _64 == 10u);
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int _65 = atomic_fetch_add_explicit((threadgroup atomic_int*)&shared_i32, 1, memory_order_relaxed);
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int _66 = atomic_fetch_or_explicit((threadgroup atomic_int*)&shared_i32, 1, memory_order_relaxed);
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int _67 = atomic_fetch_xor_explicit((threadgroup atomic_int*)&shared_i32, 1, memory_order_relaxed);
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int _68 = atomic_fetch_and_explicit((threadgroup atomic_int*)&shared_i32, 1, memory_order_relaxed);
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int _69 = atomic_fetch_min_explicit((threadgroup atomic_int*)&shared_i32, 1, memory_order_relaxed);
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int _70 = atomic_fetch_max_explicit((threadgroup atomic_int*)&shared_i32, 1, memory_order_relaxed);
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int _71 = atomic_exchange_explicit((threadgroup atomic_int*)&shared_i32, 1, memory_order_relaxed);
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int _72;
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do
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{
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_72 = 10;
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} while (!atomic_compare_exchange_weak_explicit((threadgroup atomic_int*)&shared_i32, &_72, 2, memory_order_relaxed, memory_order_relaxed) && _72 == 10);
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}
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