6a614cc7f7
We have been interchanging spv and SPIRV_Cross_ for a while, which causes weirdness since we don't explicitly ban SPIRV_Cross identifiers, as these identifiers are generally used for interface variable workarounds.
114 lines
3.5 KiB
Plaintext
114 lines
3.5 KiB
Plaintext
uint spvBitfieldInsert(uint Base, uint Insert, uint Offset, uint Count)
|
|
{
|
|
uint Mask = Count == 32 ? 0xffffffff : (((1u << Count) - 1) << (Offset & 31));
|
|
return (Base & ~Mask) | ((Insert << Offset) & Mask);
|
|
}
|
|
|
|
uint2 spvBitfieldInsert(uint2 Base, uint2 Insert, uint Offset, uint Count)
|
|
{
|
|
uint Mask = Count == 32 ? 0xffffffff : (((1u << Count) - 1) << (Offset & 31));
|
|
return (Base & ~Mask) | ((Insert << Offset) & Mask);
|
|
}
|
|
|
|
uint3 spvBitfieldInsert(uint3 Base, uint3 Insert, uint Offset, uint Count)
|
|
{
|
|
uint Mask = Count == 32 ? 0xffffffff : (((1u << Count) - 1) << (Offset & 31));
|
|
return (Base & ~Mask) | ((Insert << Offset) & Mask);
|
|
}
|
|
|
|
uint4 spvBitfieldInsert(uint4 Base, uint4 Insert, uint Offset, uint Count)
|
|
{
|
|
uint Mask = Count == 32 ? 0xffffffff : (((1u << Count) - 1) << (Offset & 31));
|
|
return (Base & ~Mask) | ((Insert << Offset) & Mask);
|
|
}
|
|
|
|
uint spvBitfieldUExtract(uint Base, uint Offset, uint Count)
|
|
{
|
|
uint Mask = Count == 32 ? 0xffffffff : ((1 << Count) - 1);
|
|
return (Base >> Offset) & Mask;
|
|
}
|
|
|
|
uint2 spvBitfieldUExtract(uint2 Base, uint Offset, uint Count)
|
|
{
|
|
uint Mask = Count == 32 ? 0xffffffff : ((1 << Count) - 1);
|
|
return (Base >> Offset) & Mask;
|
|
}
|
|
|
|
uint3 spvBitfieldUExtract(uint3 Base, uint Offset, uint Count)
|
|
{
|
|
uint Mask = Count == 32 ? 0xffffffff : ((1 << Count) - 1);
|
|
return (Base >> Offset) & Mask;
|
|
}
|
|
|
|
uint4 spvBitfieldUExtract(uint4 Base, uint Offset, uint Count)
|
|
{
|
|
uint Mask = Count == 32 ? 0xffffffff : ((1 << Count) - 1);
|
|
return (Base >> Offset) & Mask;
|
|
}
|
|
|
|
int spvBitfieldSExtract(int Base, int Offset, int Count)
|
|
{
|
|
int Mask = Count == 32 ? -1 : ((1 << Count) - 1);
|
|
int Masked = (Base >> Offset) & Mask;
|
|
int ExtendShift = (32 - Count) & 31;
|
|
return (Masked << ExtendShift) >> ExtendShift;
|
|
}
|
|
|
|
int2 spvBitfieldSExtract(int2 Base, int Offset, int Count)
|
|
{
|
|
int Mask = Count == 32 ? -1 : ((1 << Count) - 1);
|
|
int2 Masked = (Base >> Offset) & Mask;
|
|
int ExtendShift = (32 - Count) & 31;
|
|
return (Masked << ExtendShift) >> ExtendShift;
|
|
}
|
|
|
|
int3 spvBitfieldSExtract(int3 Base, int Offset, int Count)
|
|
{
|
|
int Mask = Count == 32 ? -1 : ((1 << Count) - 1);
|
|
int3 Masked = (Base >> Offset) & Mask;
|
|
int ExtendShift = (32 - Count) & 31;
|
|
return (Masked << ExtendShift) >> ExtendShift;
|
|
}
|
|
|
|
int4 spvBitfieldSExtract(int4 Base, int Offset, int Count)
|
|
{
|
|
int Mask = Count == 32 ? -1 : ((1 << Count) - 1);
|
|
int4 Masked = (Base >> Offset) & Mask;
|
|
int ExtendShift = (32 - Count) & 31;
|
|
return (Masked << ExtendShift) >> ExtendShift;
|
|
}
|
|
|
|
void comp_main()
|
|
{
|
|
int signed_value = 0;
|
|
uint unsigned_value = 0u;
|
|
int3 signed_values = int3(0, 0, 0);
|
|
uint3 unsigned_values = uint3(0u, 0u, 0u);
|
|
int s = spvBitfieldSExtract(signed_value, 5, 20);
|
|
uint u = spvBitfieldUExtract(unsigned_value, 6, 21);
|
|
s = int(spvBitfieldInsert(s, 40, 5, 4));
|
|
u = spvBitfieldInsert(u, 60u, 5, 4);
|
|
u = reversebits(u);
|
|
s = reversebits(s);
|
|
int v0 = int(countbits(u));
|
|
int v1 = countbits(s);
|
|
int v2 = int(firstbithigh(u));
|
|
int v3 = firstbitlow(s);
|
|
int3 s_1 = spvBitfieldSExtract(signed_values, 5, 20);
|
|
uint3 u_1 = spvBitfieldUExtract(unsigned_values, 6, 21);
|
|
s_1 = int3(spvBitfieldInsert(s_1, int3(40, 40, 40), 5, 4));
|
|
u_1 = spvBitfieldInsert(u_1, uint3(60u, 60u, 60u), 5, 4);
|
|
u_1 = reversebits(u_1);
|
|
s_1 = reversebits(s_1);
|
|
int3 v0_1 = int3(countbits(u_1));
|
|
int3 v1_1 = countbits(s_1);
|
|
int3 v2_1 = int3(firstbithigh(u_1));
|
|
int3 v3_1 = firstbitlow(s_1);
|
|
}
|
|
|
|
[numthreads(1, 1, 1)]
|
|
void main()
|
|
{
|
|
comp_main();
|
|
}
|