SPIRV-Cross/shaders-hlsl-no-opt/asm
2022-05-18 16:43:32 +02:00
..
comp Test aliased names in declared LUTs. 2022-01-18 12:39:16 +01:00
frag Add tests for OpCompositeInsert edge cases. 2022-05-18 16:43:32 +02:00
vert More robust handling of initialized output builtin variables. 2021-01-04 19:12:43 +01:00
temporary.zero-initialize.asm.frag Add support for forcefully zero-initialized variables. 2020-03-26 13:38:27 +01:00