2015-05-22 17:26:19 +00:00
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// Copyright (c) 2015 The Khronos Group Inc.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a
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// copy of this software and/or associated documentation files (the
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// "Materials"), to deal in the Materials without restriction, including
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// without limitation the rights to use, copy, modify, merge, publish,
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// distribute, sublicense, and/or sell copies of the Materials, and to
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// permit persons to whom the Materials are furnished to do so, subject to
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// the following conditions:
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//
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// The above copyright notice and this permission notice shall be included
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// in all copies or substantial portions of the Materials.
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//
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// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
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// KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
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// SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
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// https://www.khronos.org/registry/
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//
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// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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// MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
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#ifndef _LIBSPIRV_UTIL_BINARY_H_
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#define _LIBSPIRV_UTIL_BINARY_H_
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#include <libspirv/libspirv.h>
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2015-10-06 20:22:00 +00:00
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#include "instruction.h"
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Use opcode operand definitions from SPIR-V specification generator.
The assembler and disassembler now use a dynamically adjusted
sequence of expected operand types. (Internally, it is a deque,
for readability.) Both parsers repeatedly pull an expected operand
type from the left of this pattern list, and try to match the next
input token against it.
The expected pattern is adjusted during the parse to accommodate:
- an extended instruction's expected operands, depending on the
extended instruction's index.
- when an operand itself has operands
- to handle sequences of zero or more operands, or pairs of
operands. These are expanded lazily during the parse.
Adds spv::OperandClass from the SPIR-V specification generator.
Modifies spv_operand_desc_t:
- adds hasResult, hasType, and operandClass array to the opcode
description type.
- "wordCount" is replaced with "numTypes", which counts the number
of entries in operandTypes. And each of those describes a
*logical* operand, including the type id for the instruction,
and the result id for the instruction. A logical operand could be
variable-width, such as a literal string.
Adds opcode.inc, an automatically-generated table of operation
descriptions, with one line to describe each core instruction.
Externally, we have modified the SPIR-V spec doc generator to
emit this file.
(We have hacked this copy to use the old semantics for OpLine.)
Inside the assembler, parsing an operand may fail with new
error code SPV_FAIL_MATCH. For an optional operand, this is not
fatal, but should trigger backtracking at a higher level.
The spvTextIsStartOfNewInst checks the case of the third letter
of what might be an opcode. So now, "OpenCL" does not look like
an opcode name.
In assembly, the EntryPoint name field is mandatory, but can be
an empty string.
Adjust tests for changes to:
- OpSampedImage
- OpTypeSampler
2015-08-27 17:03:52 +00:00
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#include "operand.h"
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2015-05-22 17:26:19 +00:00
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#include "print.h"
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// Functions
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/// @brief Fix the endianness of a word
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///
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/// @param[in] word whos endianness should be fixed
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/// @param[in] endian the desired endianness
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///
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/// @return word with host endianness correction
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uint32_t spvFixWord(const uint32_t word, const spv_endianness_t endian);
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2015-09-14 19:22:23 +00:00
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/// @brief Fix the endianness of a double word
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///
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/// @param[in] low the lower 32-bit of the double word
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/// @param[in] high the higher 32-bit of the double word
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/// @param[in] endian the desired endianness
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///
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/// @return word with host endianness correction
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uint64_t spvFixDoubleWord(const uint32_t low, const uint32_t high,
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const spv_endianness_t endian);
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2015-05-22 17:26:19 +00:00
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/// @brief Determine the endianness of the SPV binary
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///
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/// Gets the endianness of the SPV source. Returns SPV_ENDIANNESS_UNKNOWN if
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/// the
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/// SPV magic number is invalid, otherwise the determined endianness.
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///
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/// @param[in] binary the binary module
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/// @param[out] pEndian return the endianness of the SPV module
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///
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/// @return result code
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spv_result_t spvBinaryEndianness(const spv_binary binary,
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spv_endianness_t *pEndian);
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/// @brief Grab the header from the SPV module
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///
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/// @param[in] binary the binary module
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/// @param[in] endian the endianness of the module
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/// @param[out] pHeader the returned header
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///
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/// @return result code
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spv_result_t spvBinaryHeaderGet(const spv_binary binary,
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const spv_endianness_t endian,
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spv_header_t *pHeader);
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/// @brief Populate a binary stream with this generators header
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///
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/// @param[in,out] binary the binary stream
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/// @param[in] bound the upper ID bound
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///
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/// @return result code
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spv_result_t spvBinaryHeaderSet(spv_binary binary, const uint32_t bound);
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/// @brief Determine the type of the desired operand
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///
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/// @param[in] word the operand value
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/// @param[in] index the word index in the instruction
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/// @param[in] opcodeEntry table of specified Opcodes
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/// @param[in] operandTable table of specified operands
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/// @param[in,out] pOperandEntry the entry in the operand table
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///
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/// @return type returned
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spv_operand_type_t spvBinaryOperandInfo(const uint32_t word,
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const uint16_t index,
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const spv_opcode_desc opcodeEntry,
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const spv_operand_table operandTable,
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spv_operand_desc *pOperandEntry);
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/// @brief Translate a binary operand to the textual form
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///
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/// @param[in] opcode of the current instruction
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/// @param[in] type type of the operand to decode
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/// @param[in] words the binary stream of words
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/// @param[in] endian the endianness of the stream
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/// @param[in] options bitfield of spv_binary_to_text_options_t values
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/// @param[in] operandTable table of specified operands
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Use opcode operand definitions from SPIR-V specification generator.
The assembler and disassembler now use a dynamically adjusted
sequence of expected operand types. (Internally, it is a deque,
for readability.) Both parsers repeatedly pull an expected operand
type from the left of this pattern list, and try to match the next
input token against it.
The expected pattern is adjusted during the parse to accommodate:
- an extended instruction's expected operands, depending on the
extended instruction's index.
- when an operand itself has operands
- to handle sequences of zero or more operands, or pairs of
operands. These are expanded lazily during the parse.
Adds spv::OperandClass from the SPIR-V specification generator.
Modifies spv_operand_desc_t:
- adds hasResult, hasType, and operandClass array to the opcode
description type.
- "wordCount" is replaced with "numTypes", which counts the number
of entries in operandTypes. And each of those describes a
*logical* operand, including the type id for the instruction,
and the result id for the instruction. A logical operand could be
variable-width, such as a literal string.
Adds opcode.inc, an automatically-generated table of operation
descriptions, with one line to describe each core instruction.
Externally, we have modified the SPIR-V spec doc generator to
emit this file.
(We have hacked this copy to use the old semantics for OpLine.)
Inside the assembler, parsing an operand may fail with new
error code SPV_FAIL_MATCH. For an optional operand, this is not
fatal, but should trigger backtracking at a higher level.
The spvTextIsStartOfNewInst checks the case of the third letter
of what might be an opcode. So now, "OpenCL" does not look like
an opcode name.
In assembly, the EntryPoint name field is mandatory, but can be
an empty string.
Adjust tests for changes to:
- OpSampedImage
- OpTypeSampler
2015-08-27 17:03:52 +00:00
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/// @param[in,out] pExpectedOperands the expected operand types
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2015-05-22 17:26:19 +00:00
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/// @param[in,out] pExtInstType type of extended instruction library
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/// @param[in,out] stream the text output stream
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/// @param[in,out] position position in the binary stream
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/// @param[out] pDiag return diagnostic on error
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///
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/// @return result code
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spv_result_t spvBinaryDecodeOperand(
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const Op opcode, const spv_operand_type_t type, const uint32_t *words,
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2015-09-14 19:22:23 +00:00
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uint16_t numWords, const spv_endianness_t endian, const uint32_t options,
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2015-05-22 17:26:19 +00:00
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const spv_operand_table operandTable, const spv_ext_inst_table extInstTable,
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Use opcode operand definitions from SPIR-V specification generator.
The assembler and disassembler now use a dynamically adjusted
sequence of expected operand types. (Internally, it is a deque,
for readability.) Both parsers repeatedly pull an expected operand
type from the left of this pattern list, and try to match the next
input token against it.
The expected pattern is adjusted during the parse to accommodate:
- an extended instruction's expected operands, depending on the
extended instruction's index.
- when an operand itself has operands
- to handle sequences of zero or more operands, or pairs of
operands. These are expanded lazily during the parse.
Adds spv::OperandClass from the SPIR-V specification generator.
Modifies spv_operand_desc_t:
- adds hasResult, hasType, and operandClass array to the opcode
description type.
- "wordCount" is replaced with "numTypes", which counts the number
of entries in operandTypes. And each of those describes a
*logical* operand, including the type id for the instruction,
and the result id for the instruction. A logical operand could be
variable-width, such as a literal string.
Adds opcode.inc, an automatically-generated table of operation
descriptions, with one line to describe each core instruction.
Externally, we have modified the SPIR-V spec doc generator to
emit this file.
(We have hacked this copy to use the old semantics for OpLine.)
Inside the assembler, parsing an operand may fail with new
error code SPV_FAIL_MATCH. For an optional operand, this is not
fatal, but should trigger backtracking at a higher level.
The spvTextIsStartOfNewInst checks the case of the third letter
of what might be an opcode. So now, "OpenCL" does not look like
an opcode name.
In assembly, the EntryPoint name field is mandatory, but can be
an empty string.
Adjust tests for changes to:
- OpSampedImage
- OpTypeSampler
2015-08-27 17:03:52 +00:00
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spv_operand_pattern_t *pExpectedOperands, spv_ext_inst_type_t *pExtInstType,
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out_stream &stream, spv_position position, spv_diagnostic *pDiagnostic);
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2015-05-22 17:26:19 +00:00
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/// @brief Translate binary Opcode stream to textual form
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///
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/// @param[in] pInst the Opcode instruction stream
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/// @param[in] endian the endianness of the stream
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/// @param[in] options bitfield of spv_binary_to_text_options_t values
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/// @param[in] opcodeTable table of specified Opcodes
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/// @param[in] operandTable table of specified operands
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2015-09-11 15:01:59 +00:00
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/// @param[in] format the assembly syntax format to decode into
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2015-05-22 17:26:19 +00:00
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/// @param[out] stream output text stream
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/// @param[in,out] position position in the stream
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/// @param[out] pDiag return diagnostic on error
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///
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/// @return result code
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spv_result_t spvBinaryDecodeOpcode(
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spv_instruction_t *pInst, const spv_endianness_t endian,
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const uint32_t options, const spv_opcode_table opcodeTable,
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const spv_operand_table operandTable, const spv_ext_inst_table extInstTable,
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2015-09-11 15:01:59 +00:00
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spv_assembly_syntax_format_t format, out_stream &stream,
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spv_position position, spv_diagnostic *pDiag);
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2015-05-22 17:26:19 +00:00
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#endif
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