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# SPIR-V Assembly language syntax
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## Overview
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The assembly attempts to adhere to the binary form from Section 3 of the SPIR-V
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spec as closely as possible, with one exception aiming at improving the text's
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readability. The `<result-id>` generated by an instruction is moved to the
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beginning of that instruction and followed by an `=` sign. This allows us to
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distinguish between variable definitions and uses and locate value definitions
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more easily.
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Here is an example:
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```
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OpCapability Shader
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OpMemoryModel Logical Simple
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OpEntryPoint GLCompute %3 "main"
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OpExecutionMode %3 LocalSize 64 64 1
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%1 = OpTypeVoid
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%2 = OpTypeFunction %1
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%3 = OpFunction %1 None %2
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%4 = OpLabel
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OpReturn
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OpFunctionEnd
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```
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A module is a sequence of instructions, separated by whitespace.
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An instruction is an opcode name followed by operands, separated by
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whitespace. Typically each instruction is presented on its own line,
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but the assembler does not enforce this rule.
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The opcode names and expected operands are described in Section 3 of
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the SPIR-V specification. An operand is one of:
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* a literal integer: A decimal integer, or a hexadecimal integer.
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A hexadecimal integer is indicated by a leading `0x` or `0X`. A hex
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integer supplied for a signed integer value will be sign-extended.
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For example, `0xffff` supplied as the literal for an `OpConstant`
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on a signed 16-bit integer type will be interpreted as the value `-1`.
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* a literal floating point number, in decimal or hexadecimal form.
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See [below](#floats).
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* a literal string.
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* A literal string is everything following a double-quote `"` until the
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following un-escaped double-quote. This includes special characters such
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as newlines.
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* A backslash `\` may be used to escape characters in the string. The `\`
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may be used to escape a double-quote or a `\` but is simply ignored when
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preceding any other character.
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* a named enumerated value, specific to that operand position. For example,
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the `OpMemoryModel` takes a named Addressing Model operand (e.g. `Logical` or
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`Physical32`), and a named Memory Model operand (e.g. `Simple` or `OpenCL`).
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Named enumerated values are only meaningful in specific positions, and will
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otherwise generate an error.
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* a mask expression, consisting of one or more mask enum names separated
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by `|`. For example, the expression `NotNaN|NotInf|NSZ` denotes the mask
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which is the combination of the `NotNaN`, `NotInf`, and `NSZ` flags.
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* an injected immediate integer: `!<integer>`. See [below](#immediate).
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* an ID, e.g. `%foo`. See [below](#id).
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* the name of an extended instruction. For example, `sqrt` in an extended
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instruction such as `%f = OpExtInst %f32 %OpenCLImport sqrt %arg`
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* the name of an opcode for OpSpecConstantOp, but where the `Op` prefix
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is removed. For example, the following indicates the use of an integer
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addition in a specialization constant computation:
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`%sum = OpSpecConstantOp %i32 IAdd %a %b`
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## ID Definitions & Usage
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<a name="id"></a>
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An ID _definition_ pertains to the `<result-id>` of an instruction, and ID
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_usage_ is a use of an ID as an input to an instruction.
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An ID in the assembly language begins with `%` and must be followed by a name
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consisting of one or more letters, numbers or underscore characters.
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For every ID in the assembly program, the assembler generates a unique number
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called the ID's internal number. Then each ID reference translates into its
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internal number in the SPIR-V output. Internal numbers are unique within the
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compilation unit: no two IDs in the same unit will share internal numbers.
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The disassembler generates IDs where the name is always a decimal number
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greater than 0.
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So the example can be rewritten using more user-friendly names, as follows:
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```
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OpCapability Shader
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OpMemoryModel Logical Simple
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OpEntryPoint GLCompute %main "main"
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OpExecutionMode %main LocalSize 64 64 1
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%void = OpTypeVoid
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%fnMain = OpTypeFunction %void
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%main = OpFunction %void None %fnMain
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%lbMain = OpLabel
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OpReturn
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OpFunctionEnd
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```
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## Floating point literals
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<a name="floats"></a>
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The assembler and disassembler support floating point literals in both
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decimal and hexadecimal form.
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The syntax for a floating point literal is the same as floating point
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constants in the C programming language, except:
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* An optional leading minus (`-`) is part of the literal.
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* An optional type specifier suffix is not allowed.
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Infinity and NaN values are expressed in hexadecimal float literals
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by using the maximum representable exponent for the bit width.
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For example, in 32-bit floating point, 8 bits are used for the exponent, and the
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exponent bias is 127. So the maximum representable unbiased exponent is 128.
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Therefore, we represent the infinities and some NaNs as follows:
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```
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%float32 = OpTypeFloat 32
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%inf = OpConstant %float32 0x1p+128
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%neginf = OpConstant %float32 -0x1p+128
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%aNaN = OpConstant %float32 0x1.8p+128
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%moreNaN = OpConstant %float32 -0x1.0002p+128
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```
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The assembler preserves all the bits of a NaN value. For example, the encoding
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of `%aNaN` in the previous example is the same as the word with bits
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`0x7fc00000`, and `%moreNaN` is encoded as `0xff800100`.
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The disassembler prints infinite, NaN, and subnormal values in hexadecimal form.
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Zero and normal values are printed in decimal form with enough digits
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to preserve all significand bits.
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## Arbitrary Integers
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<a name="immediate"></a>
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When writing tests it can be useful to emit an invalid 32 bit word into the
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binary stream at arbitrary positions within the assembly. To specify an
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arbitrary word into the stream the prefix `!` is used, this takes the form
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`!<integer>`. Here is an example.
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```
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OpCapability !0x0000FF00
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```
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Any token in a valid assembly program may be replaced by `!<integer>` -- even
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tokens that dictate how the rest of the instruction is parsed. Consider, for
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example, the following assembly program:
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```
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%4 = OpConstant %1 123 456 789 OpExecutionMode %2 LocalSize 11 22 33
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OpExecutionMode %3 InputLines
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```
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The tokens `OpConstant`, `LocalSize`, and `InputLines` may be replaced by random
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`!<integer>` values, and the assembler will still assemble an output binary with
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three instructions. It will not necessarily be valid SPIR-V, but it will
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faithfully reflect the input text.
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You may wonder how the assembler recognizes the instruction structure (including
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instruction boundaries) in the text with certain crucial tokens replaced by
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arbitrary integers. If, say, `OpConstant` becomes a `!<integer>` whose value
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differs from the binary representation of `OpConstant` (remember that this
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feature is intended for fine-grain control in SPIR-V testing), the assembler
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generally has no idea what that value stands for. So how does it know there is
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exactly one `<id>` and three number literals following in that instruction,
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before the next one begins? And if `LocalSize` is replaced by an arbitrary
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`!<integer>`, how does it know to take the next three tokens (instead of zero or
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one, both of which are possible in the absence of certainty that `LocalSize`
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provided)? The answer is a simple rule governing the parsing of instructions
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with `!<integer>` in them:
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When a token in the assembly program is a `!<integer>`, that integer value is
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emitted into the binary output, and parsing proceeds differently than before:
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each subsequent token not recognized as an OpCode or a `<result-id>` is emitted
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into the binary output without any checking; when a recognizable OpCode or a
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`<result-id>` is eventually encountered, it begins a new instruction and parsing
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returns to normal. (If a subsequent OpCode is never found, then this alternate
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parsing mode handles all the remaining tokens in the program.)
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The assembler processes the tokens encountered in alternate parsing mode as
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follows:
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* If the token is a number literal, since context may be lost, the number
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is interpreted as a 32-bit value and output as a single word. In order to
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specify multiple-word literals in alternate-parsing mode, further uses of
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`!<integer>` tokens may be required.
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All formats supported by `strtoul()` are accepted.
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* If the token is a string literal, it outputs a sequence of words representing
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the string as defined in the SPIR-V specification for Literal String.
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* If the token is an ID, it outputs the ID's internal number.
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* If the token is another `!<integer>`, it outputs that integer.
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* Any other token causes the assembler to quit with an error.
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Note that this has some interesting consequences, including:
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* When an OpCode is replaced by `!<integer>`, the integer value should encode
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the instruction's word count, as specified in the physical-layout section of
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the SPIR-V specification.
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* Consecutive instructions may have their OpCode replaced by `!<integer>` and
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still produce valid SPIR-V. For example, `!262187 %1 %2 "abc" !327739 %1 %3 6
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%2` will successfully assemble into SPIR-V declaring a constant and a
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PrivateGlobal variable.
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* Enums (such as `DontInline` or `SubgroupMemory`, for instance) are not handled
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by the alternate parsing mode. They must be replaced by `!<integer>` for
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successful assembly.
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* The `<result-id>` on the left-hand side of an assignment cannot be a
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`!<integer>`. The `<result-id>` can be still be manually controlled if desired
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by expressing the entire instruction as `!<integer>` tokens for its opcode and
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operands.
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* The `=` sign cannot be processed by the alternate parsing mode if the OpCode
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following it is a `!<integer>`.
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* When replacing a named ID with `!<integer>`, it is possible to generate
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unintentionally valid SPIR-V. If the integer provided happens to equal a
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number generated for an existing named ID, it will result in a reference to
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that named ID being output. This may be valid SPIR-V, contrary to the
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presumed intention of the writer.
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## Notes
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* Some enumerants cannot be used by name, because the target instruction
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in which they are meaningful take an ID reference instead of a literal value.
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For example:
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* Named enumerated value `CmdExecTime` from section 3.30 Kernel
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Profiling Info is used in constructing a mask value supplied as
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an ID for `OpCaptureEventProfilingInfo`. But no other instruction
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has enough context to bring the enumerant names from section 3.30
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into scope.
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* Similarly, the names in section 3.29 Kernel Enqueue Flags are used to
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construct a value supplied as an ID to the Flags argument of
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OpEnqueueKernel.
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* Similarly for the names in section 3.25 Memory Semantics.
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* Similarly for the names in section 3.27 Scope.
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* Some enumerants cannot be used by name, because they only name values
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returned by an instruction:
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* Enumerants from 3.12 Image Channel Order name possible values returned
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by the `OpImageQueryOrder` instruction.
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* Enumerants from 3.13 Image Channel Data Type name possible values
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returned by the `OpImageQueryFormat` instruction.
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