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https://github.com/KhronosGroup/SPIRV-Tools
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Assembly test for OpSwitch
Removes old weak and fragile tests for OpSwitch. Adds spvtest::TextToBinaryTest::CompileWithFormatFailure
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@ -84,17 +84,25 @@ class TextToBinaryTestBase : public T {
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return code_copy;
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}
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// Compiles SPIR-V text, asserting compilation failure. Returns the error
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// message(s).
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std::string CompileFailure(const std::string& text) {
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// Compiles SPIR-V text with the given format, asserting compilation failure.
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// Returns the error message(s).
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std::string CompileWithFormatFailure(const std::string& text,
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spv_assembly_syntax_format_t format) {
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EXPECT_NE(SPV_SUCCESS,
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spvTextToBinary(text.c_str(), text.size(), opcodeTable,
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operandTable, extInstTable, &binary, &diagnostic))
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spvTextWithFormatToBinary(text.c_str(), text.size(), format,
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opcodeTable, operandTable, extInstTable,
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&binary, &diagnostic))
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<< text;
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DestroyBinary();
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return diagnostic->error;
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}
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// Compiles SPIR-V text using the default format, asserting compilation failure.
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// Returns the error message(s).
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std::string CompileFailure(const std::string& text) {
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return CompileWithFormatFailure(text, SPV_ASSEMBLY_SYNTAX_FORMAT_DEFAULT);
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}
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// Encodes SPIR-V text into binary and then decodes the binary. Returns the
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// decoded text.
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std::string EncodeAndDecodeSuccessfully(const std::string& text) {
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@ -35,6 +35,7 @@
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namespace {
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using spvtest::MakeInstruction;
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using spvtest::TextToBinaryTest;
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using ::testing::Eq;
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// Test OpSelectionMerge
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@ -99,6 +100,66 @@ TEST_F(OpLoopMergeTest, CombinedLoopControlMask) {
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Eq(MakeInstruction(spv::OpLoopMerge, {1, 2, expected_mask})));
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}
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// Test OpSwitch
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TEST_F(TextToBinaryTest, SwitchGoodZeroTargets) {
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EXPECT_THAT(CompiledInstructions("OpSwitch %selector %default"),
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Eq(MakeInstruction(spv::OpSwitch, {1, 2})));
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}
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TEST_F(TextToBinaryTest, SwitchGoodOneTarget) {
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EXPECT_THAT(CompiledInstructions("OpSwitch %selector %default 12 %target0"),
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Eq(MakeInstruction(spv::OpSwitch, {1, 2, 12, 3})));
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}
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TEST_F(TextToBinaryTest, SwitchGoodTwoTargets) {
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EXPECT_THAT(CompiledInstructions(
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"OpSwitch %selector %default 12 %target0 42 %target1"),
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Eq(MakeInstruction(spv::OpSwitch, {1, 2, 12, 3, 42, 4})));
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}
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TEST_F(TextToBinaryTest, SwitchBadMissingSelector) {
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EXPECT_THAT(CompileFailure("OpSwitch"),
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Eq("Expected operand, found end of stream."));
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}
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TEST_F(TextToBinaryTest, SwitchBadInvalidSelector) {
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EXPECT_THAT(CompileFailure("OpSwitch 12"),
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Eq("Expected id to start with %."));
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}
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TEST_F(TextToBinaryTest, SwitchBadMissingDefault) {
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EXPECT_THAT(CompileFailure("OpSwitch %selector"),
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Eq("Expected operand, found end of stream."));
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}
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TEST_F(TextToBinaryTest, SwitchBadInvalidDefault) {
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EXPECT_THAT(CompileFailure("OpSwitch %selector 12"),
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Eq("Expected id to start with %."));
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}
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TEST_F(TextToBinaryTest, SwitchBadInvalidLiteralDefaultFormat) {
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// The assembler recognizes "OpSwitch %selector %default" as a complete
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// instruction. Then it tries to parse "%abc" as the start of an
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// assignment form instruction, but can't since it hits the end
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// of stream.
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EXPECT_THAT(CompileFailure("OpSwitch %selector %default %abc"),
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Eq("Expected '=', found end of stream."));
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}
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TEST_F(TextToBinaryTest, SwitchBadInvalidLiteralCanonicalFormat) {
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EXPECT_THAT(CompileWithFormatFailure("OpSwitch %selector %default %abc",
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SPV_ASSEMBLY_SYNTAX_FORMAT_CANONICAL),
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Eq("Expected <opcode> at the beginning of an instruction, found "
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"'%abc'."));
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}
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TEST_F(TextToBinaryTest, SwitchBadMissingTarget) {
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EXPECT_THAT(CompileFailure("OpSwitch %selector %default 12"),
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Eq("Expected operand, found end of stream."));
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}
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// TODO(dneto): OpPhi
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// TODO(dneto): OpLoopMerge
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// TODO(dneto): OpLabel
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@ -420,55 +420,6 @@ TEST_F(TextToBinaryTest, WrongOpCode) {
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EXPECT_STREQ("Invalid Opcode prefix 'Wahahaha'.", diagnostic->error);
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}
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TEST_F(TextToBinaryTest, GoodSwitch) {
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const SpirvVector code = CompileSuccessfully(R"(
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%i32 = OpTypeInt 32 0
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%fortytwo = OpConstant %i32 42
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%twelve = OpConstant %i32 12
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%entry = OpLabel
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OpSwitch %fortytwo %default 42 %go42 12 %go12
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%go42 = OpLabel
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OpBranch %default
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%go12 = OpLabel
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OpBranch %default
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%default = OpLabel
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)");
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// Minimal check: The OpSwitch opcode word is correct.
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EXPECT_EQ((int(spv::OpSwitch) | (7 << 16)), code[14 + SPV_INDEX_INSTRUCTION]);
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}
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TEST_F(TextToBinaryTest, GoodSwitchZeroCasesOneDefault) {
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const SpirvVector code = CompileSuccessfully(R"(
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%i32 = OpTypeInt 32 0
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%fortytwo = OpConstant %i32 42
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%entry = OpLabel
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OpSwitch %fortytwo %default
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%default = OpLabel
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)");
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// Minimal check: The OpSwitch opcode word is correct.
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EXPECT_EQ((int(spv::OpSwitch) | (3 << 16)), code[10 + SPV_INDEX_INSTRUCTION]);
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}
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TEST_F(TextToBinaryTest, BadSwitchTruncatedCase) {
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SetText(R"(
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%i32 = OpTypeInt 32 0
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%fortytwo = OpConstant %i32 42
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%entry = OpLabel
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OpSwitch %fortytwo %default 42 ; missing target!
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%default = OpLabel
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)");
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EXPECT_EQ(SPV_ERROR_INVALID_TEXT,
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spvTextToBinary(text.str, text.length, opcodeTable, operandTable,
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extInstTable, &binary, &diagnostic));
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EXPECT_EQ(6, diagnostic->position.line + 1);
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EXPECT_EQ(1, diagnostic->position.column + 1);
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EXPECT_STREQ("Expected operand, found next instruction instead.",
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diagnostic->error);
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}
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using TextToBinaryFloatValueTest = spvtest::TextToBinaryTestBase<
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::testing::TestWithParam<std::pair<std::string, uint32_t>>>;
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