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Add operand types for SPV_NV_raw_access_chains (#5602)
This is needed to unblock builds with updated SPIR-V headers. It is not a replacement for #5568.
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@ -303,6 +303,10 @@ typedef enum spv_operand_type_t {
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SPV_OPERAND_TYPE_STORE_CACHE_CONTROL,
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// Enum type from SPV_INTEL_maximum_registers
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SPV_OPERAND_TYPE_NAMED_MAXIMUM_NUMBER_OF_REGISTERS,
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// Enum type from SPV_NV_raw_access_chains
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SPV_OPERAND_TYPE_RAW_ACCESS_CHAIN_OPERANDS,
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// Optional enum type from SPV_NV_raw_access_chains
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SPV_OPERAND_TYPE_OPTIONAL_RAW_ACCESS_CHAIN_OPERANDS,
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// This is a sentinel value, and does not represent an operand type.
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// It should come last.
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@ -711,6 +711,7 @@ spv_result_t Parser::parseOperand(size_t inst_offset,
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case SPV_OPERAND_TYPE_IMAGE:
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case SPV_OPERAND_TYPE_OPTIONAL_IMAGE:
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case SPV_OPERAND_TYPE_OPTIONAL_MEMORY_ACCESS:
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case SPV_OPERAND_TYPE_OPTIONAL_RAW_ACCESS_CHAIN_OPERANDS:
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case SPV_OPERAND_TYPE_SELECTION_CONTROL:
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case SPV_OPERAND_TYPE_CLDEBUG100_DEBUG_INFO_FLAGS:
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case SPV_OPERAND_TYPE_DEBUG_INFO_FLAGS:
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@ -721,10 +722,12 @@ spv_result_t Parser::parseOperand(size_t inst_offset,
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// Map an optional operand type to its corresponding concrete type.
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if (type == SPV_OPERAND_TYPE_OPTIONAL_IMAGE)
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parsed_operand.type = SPV_OPERAND_TYPE_IMAGE;
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else if (type == SPV_OPERAND_TYPE_OPTIONAL_MEMORY_ACCESS)
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if (type == SPV_OPERAND_TYPE_OPTIONAL_MEMORY_ACCESS)
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parsed_operand.type = SPV_OPERAND_TYPE_MEMORY_ACCESS;
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if (type == SPV_OPERAND_TYPE_OPTIONAL_COOPERATIVE_MATRIX_OPERANDS)
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parsed_operand.type = SPV_OPERAND_TYPE_COOPERATIVE_MATRIX_OPERANDS;
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if (type == SPV_OPERAND_TYPE_OPTIONAL_RAW_ACCESS_CHAIN_OPERANDS)
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parsed_operand.type = SPV_OPERAND_TYPE_RAW_ACCESS_CHAIN_OPERANDS;
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// Check validity of set mask bits. Also prepare for operands for those
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// masks if they have any. To get operand order correct, scan from
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@ -425,6 +425,7 @@ void InstructionDisassembler::EmitOperand(const spv_parsed_instruction_t& inst,
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case SPV_OPERAND_TYPE_SELECTION_CONTROL:
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case SPV_OPERAND_TYPE_DEBUG_INFO_FLAGS:
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case SPV_OPERAND_TYPE_CLDEBUG100_DEBUG_INFO_FLAGS:
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case SPV_OPERAND_TYPE_RAW_ACCESS_CHAIN_OPERANDS:
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EmitMaskOperand(operand.type, word);
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break;
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default:
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@ -222,6 +222,9 @@ const char* spvOperandTypeStr(spv_operand_type_t type) {
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return "store cache control";
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case SPV_OPERAND_TYPE_NAMED_MAXIMUM_NUMBER_OF_REGISTERS:
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return "named maximum number of registers";
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case SPV_OPERAND_TYPE_RAW_ACCESS_CHAIN_OPERANDS:
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case SPV_OPERAND_TYPE_OPTIONAL_RAW_ACCESS_CHAIN_OPERANDS:
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return "raw access chain operands";
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case SPV_OPERAND_TYPE_IMAGE:
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case SPV_OPERAND_TYPE_OPTIONAL_IMAGE:
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return "image";
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@ -382,6 +385,7 @@ bool spvOperandIsConcreteMask(spv_operand_type_t type) {
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case SPV_OPERAND_TYPE_DEBUG_INFO_FLAGS:
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case SPV_OPERAND_TYPE_CLDEBUG100_DEBUG_INFO_FLAGS:
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case SPV_OPERAND_TYPE_COOPERATIVE_MATRIX_OPERANDS:
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case SPV_OPERAND_TYPE_RAW_ACCESS_CHAIN_OPERANDS:
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return true;
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default:
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break;
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@ -402,6 +406,7 @@ bool spvOperandIsOptional(spv_operand_type_t type) {
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case SPV_OPERAND_TYPE_OPTIONAL_PACKED_VECTOR_FORMAT:
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case SPV_OPERAND_TYPE_OPTIONAL_COOPERATIVE_MATRIX_OPERANDS:
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case SPV_OPERAND_TYPE_OPTIONAL_CIV:
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case SPV_OPERAND_TYPE_OPTIONAL_RAW_ACCESS_CHAIN_OPERANDS:
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return true;
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default:
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break;
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@ -411,6 +411,7 @@ spv_result_t spvTextEncodeOperand(const spvtools::AssemblyGrammar& grammar,
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case SPV_OPERAND_TYPE_IMAGE:
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case SPV_OPERAND_TYPE_OPTIONAL_IMAGE:
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case SPV_OPERAND_TYPE_OPTIONAL_MEMORY_ACCESS:
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case SPV_OPERAND_TYPE_OPTIONAL_RAW_ACCESS_CHAIN_OPERANDS:
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case SPV_OPERAND_TYPE_SELECTION_CONTROL:
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case SPV_OPERAND_TYPE_DEBUG_INFO_FLAGS:
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case SPV_OPERAND_TYPE_CLDEBUG100_DEBUG_INFO_FLAGS:
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@ -540,7 +540,7 @@ def generate_operand_kind_table(enums):
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# We have a few operand kinds that require their optional counterpart to
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# exist in the operand info table.
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optional_enums = ['ImageOperands', 'AccessQualifier', 'MemoryAccess', 'PackedVectorFormat', 'CooperativeMatrixOperands']
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optional_enums = ['ImageOperands', 'AccessQualifier', 'MemoryAccess', 'PackedVectorFormat', 'CooperativeMatrixOperands', 'RawAccessChainOperands']
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optional_enums = [e for e in enums if e[0] in optional_enums]
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enums.extend(optional_enums)
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