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Update test for parsing memory access masks (#4703)
* Update test for parsing memory access masks Needed to support SPV_INTEL_memory_access_aliasing extension There is a negative test that checks unused mask bits. Some of those bits are now sued by the new Intel extension. * Update deps for new SPIRV-Headers
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DEPS
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DEPS
@ -6,7 +6,7 @@ vars = {
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'effcee_revision': 'ddf5e2bb92957dc8a12c5392f8495333d6844133',
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'googletest_revision': 'f45d5865ed0b2b8912244627cdf508a24cc6ccb4',
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're2_revision': '611baecbcedc9cec1f46e38616b6d8880b676c03',
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'spirv_headers_revision': 'b42ba6d92faf6b4938e6f22ddd186dbdacc98d78',
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'spirv_headers_revision': '6a55fade62dec6a406a5a721148f88a2211cbefa',
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}
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deps = {
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@ -91,9 +91,14 @@ INSTANTIATE_TEST_SUITE_P(
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{SPV_OPERAND_TYPE_OPTIONAL_MEMORY_ACCESS, 0, {PREFIX0}, {PREFIX0}},
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// Unknown bits means no change. Use all bits that aren't in the
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// grammar.
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// The last mask enum is 0x20
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// The used mask bits are:
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// 1 through...
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// 0x20 SpvMemoryAccessNonPrivatePointerMask
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// also
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// 0x10000 SpvMemoryAccessAliasScopeINTELMaskShift
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// 0x20000 SpvMemoryAccessNoAliasINTELMaskMask
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{SPV_OPERAND_TYPE_OPTIONAL_MEMORY_ACCESS,
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0xffffffc0,
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0xffffffc0 ^ (0x10000) ^ (0x20000),
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{PREFIX1},
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{PREFIX1}},
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// Volatile has no operands.
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@ -111,6 +116,7 @@ INSTANTIATE_TEST_SUITE_P(
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SpvMemoryAccessVolatileMask | SpvMemoryAccessAlignedMask,
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{PREFIX1},
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{PREFIX1, SPV_OPERAND_TYPE_LITERAL_INTEGER}},
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// Newer masks are not tested
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}));
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#undef PREFIX0
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#undef PREFIX1
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