Update test for parsing memory access masks (#4703)

* Update test for parsing memory access masks

Needed to support SPV_INTEL_memory_access_aliasing extension

There is a negative test that checks unused mask bits.
Some of those bits are now sued by the new Intel extension.

* Update deps for new SPIRV-Headers
This commit is contained in:
David Neto 2022-02-09 13:02:19 -05:00 committed by GitHub
parent 332475dbc9
commit 9fe41e60d8
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2 changed files with 9 additions and 3 deletions

2
DEPS
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@ -6,7 +6,7 @@ vars = {
'effcee_revision': 'ddf5e2bb92957dc8a12c5392f8495333d6844133',
'googletest_revision': 'f45d5865ed0b2b8912244627cdf508a24cc6ccb4',
're2_revision': '611baecbcedc9cec1f46e38616b6d8880b676c03',
'spirv_headers_revision': 'b42ba6d92faf6b4938e6f22ddd186dbdacc98d78',
'spirv_headers_revision': '6a55fade62dec6a406a5a721148f88a2211cbefa',
}
deps = {

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@ -91,9 +91,14 @@ INSTANTIATE_TEST_SUITE_P(
{SPV_OPERAND_TYPE_OPTIONAL_MEMORY_ACCESS, 0, {PREFIX0}, {PREFIX0}},
// Unknown bits means no change. Use all bits that aren't in the
// grammar.
// The last mask enum is 0x20
// The used mask bits are:
// 1 through...
// 0x20 SpvMemoryAccessNonPrivatePointerMask
// also
// 0x10000 SpvMemoryAccessAliasScopeINTELMaskShift
// 0x20000 SpvMemoryAccessNoAliasINTELMaskMask
{SPV_OPERAND_TYPE_OPTIONAL_MEMORY_ACCESS,
0xffffffc0,
0xffffffc0 ^ (0x10000) ^ (0x20000),
{PREFIX1},
{PREFIX1}},
// Volatile has no operands.
@ -111,6 +116,7 @@ INSTANTIATE_TEST_SUITE_P(
SpvMemoryAccessVolatileMask | SpvMemoryAccessAlignedMask,
{PREFIX1},
{PREFIX1, SPV_OPERAND_TYPE_LITERAL_INTEGER}},
// Newer masks are not tested
}));
#undef PREFIX0
#undef PREFIX1