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https://github.com/KhronosGroup/SPIRV-Tools
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printf: Remove stage specific info (#5495)
Remove stage specific debug info that is only needed by GPU-AV. This allows debug printfs to be used in multi-stage shader modules. Fixes #4892
This commit is contained in:
Jeremy Gebben
GitHub
parent
e7a52b70fe
commit
b5d60826e9
@ -73,81 +73,11 @@ static const int kInstCommonOutShaderId = 1;
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// which generated the validation error.
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static const int kInstCommonOutInstructionIdx = 2;
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// This is the stage which generated the validation error. This word is used
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// to determine the contents of the next two words in the record.
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// 0:Vert, 1:TessCtrl, 2:TessEval, 3:Geom, 4:Frag, 5:Compute
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static const int kInstCommonOutStageIdx = 3;
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static const int kInstCommonOutCnt = 4;
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// Stage-specific Stream Record Offsets
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//
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// Each stage will contain different values in the next set of words of the
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// record used to identify which instantiation of the shader generated the
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// validation error.
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//
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// Vertex Shader Output Record Offsets
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static const int kInstVertOutVertexIndex = kInstCommonOutCnt;
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static const int kInstVertOutInstanceIndex = kInstCommonOutCnt + 1;
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static const int kInstVertOutUnused = kInstCommonOutCnt + 2;
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// Frag Shader Output Record Offsets
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static const int kInstFragOutFragCoordX = kInstCommonOutCnt;
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static const int kInstFragOutFragCoordY = kInstCommonOutCnt + 1;
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static const int kInstFragOutUnused = kInstCommonOutCnt + 2;
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// Compute Shader Output Record Offsets
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static const int kInstCompOutGlobalInvocationIdX = kInstCommonOutCnt;
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static const int kInstCompOutGlobalInvocationIdY = kInstCommonOutCnt + 1;
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static const int kInstCompOutGlobalInvocationIdZ = kInstCommonOutCnt + 2;
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// Tessellation Control Shader Output Record Offsets
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static const int kInstTessCtlOutInvocationId = kInstCommonOutCnt;
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static const int kInstTessCtlOutPrimitiveId = kInstCommonOutCnt + 1;
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static const int kInstTessCtlOutUnused = kInstCommonOutCnt + 2;
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// Tessellation Eval Shader Output Record Offsets
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static const int kInstTessEvalOutPrimitiveId = kInstCommonOutCnt;
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static const int kInstTessEvalOutTessCoordU = kInstCommonOutCnt + 1;
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static const int kInstTessEvalOutTessCoordV = kInstCommonOutCnt + 2;
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// Geometry Shader Output Record Offsets
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static const int kInstGeomOutPrimitiveId = kInstCommonOutCnt;
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static const int kInstGeomOutInvocationId = kInstCommonOutCnt + 1;
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static const int kInstGeomOutUnused = kInstCommonOutCnt + 2;
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// Ray Tracing Shader Output Record Offsets
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static const int kInstRayTracingOutLaunchIdX = kInstCommonOutCnt;
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static const int kInstRayTracingOutLaunchIdY = kInstCommonOutCnt + 1;
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static const int kInstRayTracingOutLaunchIdZ = kInstCommonOutCnt + 2;
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// Mesh Shader Output Record Offsets
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static const int kInstMeshOutGlobalInvocationIdX = kInstCommonOutCnt;
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static const int kInstMeshOutGlobalInvocationIdY = kInstCommonOutCnt + 1;
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static const int kInstMeshOutGlobalInvocationIdZ = kInstCommonOutCnt + 2;
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// Task Shader Output Record Offsets
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static const int kInstTaskOutGlobalInvocationIdX = kInstCommonOutCnt;
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static const int kInstTaskOutGlobalInvocationIdY = kInstCommonOutCnt + 1;
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static const int kInstTaskOutGlobalInvocationIdZ = kInstCommonOutCnt + 2;
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// Size of Common and Stage-specific Members
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static const int kInstStageOutCnt = kInstCommonOutCnt + 3;
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// Debug Buffer Bindings
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//
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// These are the bindings for the different buffers which are
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// read or written by the instrumentation passes.
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//
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// This is the output buffer written by InstBindlessCheckPass,
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// InstBuffAddrCheckPass, and possibly other future validations.
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static const int kDebugOutputBindingStream = 0;
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// The binding for the input buffer read by InstBindlessCheckPass.
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static const int kDebugInputBindingBindless = 1;
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// The binding for the input buffer read by InstBuffAddrCheckPass.
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static const int kDebugInputBindingBuffAddr = 2;
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// This is the output buffer written by InstDebugPrintfPass.
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static const int kDebugOutputPrintfStream = 3;
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@ -29,7 +29,7 @@ namespace opt {
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class InstBindlessCheckPass : public InstrumentPass {
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public:
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InstBindlessCheckPass(uint32_t shader_id)
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: InstrumentPass(0, shader_id, true) {}
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: InstrumentPass(0, shader_id, true, true) {}
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~InstBindlessCheckPass() override = default;
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@ -29,9 +29,10 @@ namespace opt {
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class InstBuffAddrCheckPass : public InstrumentPass {
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public:
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// For test harness only
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InstBuffAddrCheckPass() : InstrumentPass(0, 23) {}
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InstBuffAddrCheckPass() : InstrumentPass(0, 23, false, true) {}
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// For all other interfaces
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InstBuffAddrCheckPass(uint32_t shader_id) : InstrumentPass(0, shader_id) {}
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InstBuffAddrCheckPass(uint32_t shader_id)
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: InstrumentPass(0, shader_id, false, true) {}
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~InstBuffAddrCheckPass() override = default;
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@ -138,7 +138,7 @@ void InstDebugPrintfPass::GenOutputValues(Instruction* val_inst,
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}
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void InstDebugPrintfPass::GenOutputCode(
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Instruction* printf_inst, uint32_t stage_idx,
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Instruction* printf_inst,
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std::vector<std::unique_ptr<BasicBlock>>* new_blocks) {
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BasicBlock* back_blk_ptr = &*new_blocks->back();
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InstructionBuilder builder(
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@ -168,14 +168,14 @@ void InstDebugPrintfPass::GenOutputCode(
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});
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GenDebugStreamWrite(
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builder.GetUintConstantId(shader_id_),
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builder.GetUintConstantId(uid2offset_[printf_inst->unique_id()]),
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GenStageInfo(stage_idx, &builder), val_ids, &builder);
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builder.GetUintConstantId(uid2offset_[printf_inst->unique_id()]), val_ids,
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&builder);
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context()->KillInst(printf_inst);
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}
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void InstDebugPrintfPass::GenDebugPrintfCode(
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BasicBlock::iterator ref_inst_itr,
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UptrVectorIterator<BasicBlock> ref_block_itr, uint32_t stage_idx,
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UptrVectorIterator<BasicBlock> ref_block_itr,
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std::vector<std::unique_ptr<BasicBlock>>* new_blocks) {
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// If not DebugPrintf OpExtInst, return.
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Instruction* printf_inst = &*ref_inst_itr;
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@ -191,7 +191,7 @@ void InstDebugPrintfPass::GenDebugPrintfCode(
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MovePreludeCode(ref_inst_itr, ref_block_itr, &new_blk_ptr);
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new_blocks->push_back(std::move(new_blk_ptr));
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// Generate instructions to output printf args to printf buffer
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GenOutputCode(printf_inst, stage_idx, new_blocks);
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GenOutputCode(printf_inst, new_blocks);
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// Caller expects at least two blocks with last block containing remaining
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// code, so end block after instrumentation, create remainder block, and
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// branch to it
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@ -301,8 +301,7 @@ uint32_t InstDebugPrintfPass::GetStreamWriteFunctionId(uint32_t param_cnt) {
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enum {
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kShaderId = 0,
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kInstructionIndex = 1,
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kStageInfo = 2,
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kFirstParam = 3,
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kFirstParam = 2,
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};
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// Total param count is common params plus validation-specific
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// params
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@ -312,12 +311,9 @@ uint32_t InstDebugPrintfPass::GetStreamWriteFunctionId(uint32_t param_cnt) {
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analysis::TypeManager* type_mgr = context()->get_type_mgr();
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const analysis::Type* uint_type = GetInteger(32, false);
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const analysis::Vector v4uint(uint_type, 4);
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const analysis::Type* v4uint_type = type_mgr->GetRegisteredType(&v4uint);
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std::vector<const analysis::Type*> param_types(kFirstParam + param_cnt,
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uint_type);
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param_types[kStageInfo] = v4uint_type;
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std::unique_ptr<Function> output_func = StartFunction(
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param2output_func_id_[param_cnt], type_mgr->GetVoidType(), param_types);
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@ -330,8 +326,8 @@ uint32_t InstDebugPrintfPass::GetStreamWriteFunctionId(uint32_t param_cnt) {
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context(), &*new_blk_ptr,
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IRContext::kAnalysisDefUse | IRContext::kAnalysisInstrToBlockMapping);
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// Gen test if debug output buffer size will not be exceeded.
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const uint32_t val_spec_offset = kInstStageOutCnt;
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const uint32_t obuf_record_sz = val_spec_offset + param_cnt;
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const uint32_t first_param_offset = kInstCommonOutInstructionIdx + 1;
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const uint32_t obuf_record_sz = first_param_offset + param_cnt;
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const uint32_t buf_id = GetOutputBufferId();
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const uint32_t buf_uint_ptr_id = GetOutputBufferPtrId();
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Instruction* obuf_curr_sz_ac_inst = builder.AddAccessChain(
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@ -382,16 +378,9 @@ uint32_t InstDebugPrintfPass::GetStreamWriteFunctionId(uint32_t param_cnt) {
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// Store Instruction Idx
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GenDebugOutputFieldCode(obuf_curr_sz_id, kInstCommonOutInstructionIdx,
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param_ids[kInstructionIndex], &builder);
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// Store stage info. Stage Idx + 3 words of stage-specific data.
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for (uint32_t i = 0; i < 4; ++i) {
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Instruction* field =
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builder.AddCompositeExtract(GetUintId(), param_ids[kStageInfo], {i});
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GenDebugOutputFieldCode(obuf_curr_sz_id, kInstCommonOutStageIdx + i,
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field->result_id(), &builder);
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}
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// Gen writes of validation specific data
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for (uint32_t i = 0; i < param_cnt; ++i) {
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GenDebugOutputFieldCode(obuf_curr_sz_id, val_spec_offset + i,
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GenDebugOutputFieldCode(obuf_curr_sz_id, first_param_offset + i,
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param_ids[kFirstParam + i], &builder);
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}
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// Close write block and gen merge block
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@ -416,12 +405,12 @@ uint32_t InstDebugPrintfPass::GetStreamWriteFunctionId(uint32_t param_cnt) {
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}
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void InstDebugPrintfPass::GenDebugStreamWrite(
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uint32_t shader_id, uint32_t instruction_idx_id, uint32_t stage_info_id,
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uint32_t shader_id, uint32_t instruction_idx_id,
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const std::vector<uint32_t>& validation_ids, InstructionBuilder* builder) {
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// Call debug output function. Pass func_idx, instruction_idx and
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// validation ids as args.
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uint32_t val_id_cnt = static_cast<uint32_t>(validation_ids.size());
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std::vector<uint32_t> args = {shader_id, instruction_idx_id, stage_info_id};
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std::vector<uint32_t> args = {shader_id, instruction_idx_id};
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(void)args.insert(args.end(), validation_ids.begin(), validation_ids.end());
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(void)builder->AddFunctionCall(GetVoidId(),
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GetStreamWriteFunctionId(val_id_cnt), args);
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@ -455,10 +444,10 @@ Pass::Status InstDebugPrintfPass::ProcessImpl() {
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// Perform printf instrumentation on each entry point function in module
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InstProcessFunction pfn =
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[this](BasicBlock::iterator ref_inst_itr,
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UptrVectorIterator<BasicBlock> ref_block_itr, uint32_t stage_idx,
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UptrVectorIterator<BasicBlock> ref_block_itr,
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[[maybe_unused]] uint32_t stage_idx,
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std::vector<std::unique_ptr<BasicBlock>>* new_blocks) {
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return GenDebugPrintfCode(ref_inst_itr, ref_block_itr, stage_idx,
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new_blocks);
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return GenDebugPrintfCode(ref_inst_itr, ref_block_itr, new_blocks);
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};
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(void)InstProcessEntryPointCallTree(pfn);
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// Remove DebugPrintf OpExtInstImport instruction
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@ -28,10 +28,10 @@ namespace opt {
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class InstDebugPrintfPass : public InstrumentPass {
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public:
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// For test harness only
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InstDebugPrintfPass() : InstrumentPass(7, 23) {}
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InstDebugPrintfPass() : InstrumentPass(7, 23, false, false) {}
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// For all other interfaces
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InstDebugPrintfPass(uint32_t desc_set, uint32_t shader_id)
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: InstrumentPass(desc_set, shader_id) {}
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: InstrumentPass(desc_set, shader_id, false, false) {}
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~InstDebugPrintfPass() override = default;
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@ -52,9 +52,7 @@ class InstDebugPrintfPass : public InstrumentPass {
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// validation and write a record to the end of the stream, if enough space
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// in the buffer remains. The record will contain the index of the function
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// and instruction within that function |func_idx, instruction_idx| which
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// generated the record. It will also contain additional information to
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// identify the instance of the shader, depending on the stage |stage_idx|
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// of the shader. Finally, the record will contain validation-specific
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// generated the record. Finally, the record will contain validation-specific
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// data contained in |validation_ids| which will identify the validation
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// error as well as the values involved in the error.
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//
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@ -83,9 +81,6 @@ class InstDebugPrintfPass : public InstrumentPass {
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// Record Size
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// Shader ID
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// Instruction Index
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// Stage
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// Stage-specific Word 0
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// Stage-specific Word 1
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// ...
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// Validation Error Code
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// Validation-specific Word 0
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@ -93,8 +88,8 @@ class InstDebugPrintfPass : public InstrumentPass {
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// Validation-specific Word 2
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// ...
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//
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// Each record consists of three subsections: members common across all
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// validation, members specific to the stage, and members specific to a
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// Each record consists of two subsections: members common across all
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// validation and members specific to a
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// validation.
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//
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// The Record Size is the number of 32-bit words in the record, including
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@ -106,18 +101,6 @@ class InstDebugPrintfPass : public InstrumentPass {
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// The Instruction Index is the position of the instruction within the
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// SPIR-V file which is in error.
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//
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// The Stage is the pipeline stage which has generated the error as defined
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// by the SpvExecutionModel_ enumeration. This is used to interpret the
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// following Stage-specific words.
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//
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// The Stage-specific Words identify which invocation of the shader generated
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// the error. Every stage will write a fixed number of words. Vertex shaders
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// will write the Vertex and Instance ID. Fragment shaders will write
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// FragCoord.xy. Compute shaders will write the GlobalInvocation ID.
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// The tessellation eval shader will write the Primitive ID and TessCoords.uv.
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// The tessellation control shader and geometry shader will write the
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// Primitive ID and Invocation ID.
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//
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// The Validation Error Code specifies the exact error which has occurred.
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// These are enumerated with the kInstError* static consts. This allows
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// multiple validation layers to use the same, single output buffer.
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@ -131,7 +114,6 @@ class InstDebugPrintfPass : public InstrumentPass {
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// before writing, the size of the debug out buffer can be used by the
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// validation layer to control the number of error records that are written.
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void GenDebugStreamWrite(uint32_t shader_id, uint32_t instruction_idx_id,
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uint32_t stage_info_id,
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const std::vector<uint32_t>& validation_ids,
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InstructionBuilder* builder);
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@ -144,7 +126,7 @@ class InstDebugPrintfPass : public InstrumentPass {
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// If |ref_inst_itr| is an OpDebugPrintf, return in |new_blocks| the result
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// of replacing it with buffer write instructions within its block at
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// |ref_block_itr|. The instructions write a record to the printf
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// output buffer stream including |function_idx, instruction_idx, stage_idx|
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// output buffer stream including |function_idx, instruction_idx|
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// and removes the OpDebugPrintf. The block at |ref_block_itr| can just be
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// replaced with the block in |new_blocks|. Besides the buffer writes, this
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// block will comprise all instructions preceding and following
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@ -162,7 +144,6 @@ class InstDebugPrintfPass : public InstrumentPass {
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// DebugPrintf.
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void GenDebugPrintfCode(BasicBlock::iterator ref_inst_itr,
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UptrVectorIterator<BasicBlock> ref_block_itr,
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uint32_t stage_idx,
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std::vector<std::unique_ptr<BasicBlock>>* new_blocks);
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// Generate a sequence of uint32 instructions in |builder| (if necessary)
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@ -175,7 +156,7 @@ class InstDebugPrintfPass : public InstrumentPass {
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// Generate instructions to write a record containing the operands of
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// |printf_inst| arguments to printf buffer, adding new code to the end of
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// the last block in |new_blocks|. Kill OpDebugPrintf instruction.
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void GenOutputCode(Instruction* printf_inst, uint32_t stage_idx,
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void GenOutputCode(Instruction* printf_inst,
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std::vector<std::unique_ptr<BasicBlock>>* new_blocks);
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// Set the name for a function or global variable, names will be
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@ -653,44 +653,50 @@ bool InstrumentPass::InstProcessCallTreeFromRoots(InstProcessFunction& pfn,
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}
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bool InstrumentPass::InstProcessEntryPointCallTree(InstProcessFunction& pfn) {
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// Make sure all entry points have the same execution model. Do not
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// instrument if they do not.
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// TODO(greg-lunarg): Handle mixed stages. Technically, a shader module
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// can contain entry points with different execution models, although
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// such modules will likely be rare as GLSL and HLSL are geared toward
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// one model per module. In such cases we will need
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// to clone any functions which are in the call trees of entrypoints
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// with differing execution models.
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spv::ExecutionModel stage = context()->GetStage();
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// Check for supported stages
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if (stage != spv::ExecutionModel::Vertex &&
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stage != spv::ExecutionModel::Fragment &&
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stage != spv::ExecutionModel::Geometry &&
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stage != spv::ExecutionModel::GLCompute &&
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stage != spv::ExecutionModel::TessellationControl &&
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stage != spv::ExecutionModel::TessellationEvaluation &&
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stage != spv::ExecutionModel::TaskNV &&
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stage != spv::ExecutionModel::MeshNV &&
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stage != spv::ExecutionModel::RayGenerationNV &&
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stage != spv::ExecutionModel::IntersectionNV &&
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stage != spv::ExecutionModel::AnyHitNV &&
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stage != spv::ExecutionModel::ClosestHitNV &&
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stage != spv::ExecutionModel::MissNV &&
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stage != spv::ExecutionModel::CallableNV &&
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stage != spv::ExecutionModel::TaskEXT &&
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stage != spv::ExecutionModel::MeshEXT) {
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if (consumer()) {
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std::string message = "Stage not supported by instrumentation";
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consumer()(SPV_MSG_ERROR, 0, {0, 0, 0}, message.c_str());
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uint32_t stage_id;
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if (use_stage_info_) {
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// Make sure all entry points have the same execution model. Do not
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// instrument if they do not.
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// TODO(greg-lunarg): Handle mixed stages. Technically, a shader module
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// can contain entry points with different execution models, although
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// such modules will likely be rare as GLSL and HLSL are geared toward
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// one model per module. In such cases we will need
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// to clone any functions which are in the call trees of entrypoints
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// with differing execution models.
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spv::ExecutionModel stage = context()->GetStage();
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// Check for supported stages
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if (stage != spv::ExecutionModel::Vertex &&
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stage != spv::ExecutionModel::Fragment &&
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stage != spv::ExecutionModel::Geometry &&
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stage != spv::ExecutionModel::GLCompute &&
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stage != spv::ExecutionModel::TessellationControl &&
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stage != spv::ExecutionModel::TessellationEvaluation &&
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stage != spv::ExecutionModel::TaskNV &&
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stage != spv::ExecutionModel::MeshNV &&
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stage != spv::ExecutionModel::RayGenerationNV &&
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stage != spv::ExecutionModel::IntersectionNV &&
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stage != spv::ExecutionModel::AnyHitNV &&
|
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stage != spv::ExecutionModel::ClosestHitNV &&
|
||||
stage != spv::ExecutionModel::MissNV &&
|
||||
stage != spv::ExecutionModel::CallableNV &&
|
||||
stage != spv::ExecutionModel::TaskEXT &&
|
||||
stage != spv::ExecutionModel::MeshEXT) {
|
||||
if (consumer()) {
|
||||
std::string message = "Stage not supported by instrumentation";
|
||||
consumer()(SPV_MSG_ERROR, 0, {0, 0, 0}, message.c_str());
|
||||
}
|
||||
return false;
|
||||
}
|
||||
return false;
|
||||
stage_id = static_cast<uint32_t>(stage);
|
||||
} else {
|
||||
stage_id = 0;
|
||||
}
|
||||
// Add together the roots of all entry points
|
||||
std::queue<uint32_t> roots;
|
||||
for (auto& e : get_module()->entry_points()) {
|
||||
roots.push(e.GetSingleWordInOperand(kEntryPointFunctionIdInIdx));
|
||||
}
|
||||
bool modified = InstProcessCallTreeFromRoots(pfn, &roots, uint32_t(stage));
|
||||
bool modified = InstProcessCallTreeFromRoots(pfn, &roots, stage_id);
|
||||
return modified;
|
||||
}
|
||||
|
||||
|
||||
@ -77,12 +77,13 @@ class InstrumentPass : public Pass {
|
||||
// set |desc_set| for debug input and output buffers and writes |shader_id|
|
||||
// into debug output records. |opt_direct_reads| indicates that the pass
|
||||
// will see direct input buffer reads and should prepare to optimize them.
|
||||
InstrumentPass(uint32_t desc_set, uint32_t shader_id,
|
||||
bool opt_direct_reads = false)
|
||||
InstrumentPass(uint32_t desc_set, uint32_t shader_id, bool opt_direct_reads,
|
||||
bool use_stage_info)
|
||||
: Pass(),
|
||||
desc_set_(desc_set),
|
||||
shader_id_(shader_id),
|
||||
opt_direct_reads_(opt_direct_reads) {}
|
||||
opt_direct_reads_(opt_direct_reads),
|
||||
use_stage_info_(use_stage_info) {}
|
||||
|
||||
// Initialize state for instrumentation of module.
|
||||
void InitializeInstrument();
|
||||
@ -312,7 +313,11 @@ class InstrumentPass : public Pass {
|
||||
|
||||
// Optimize direct debug input buffer reads. Specifically, move all such
|
||||
// reads with constant args to first block and reuse them.
|
||||
bool opt_direct_reads_{false};
|
||||
const bool opt_direct_reads_;
|
||||
|
||||
// Set true if the instrumentation needs to know the current stage.
|
||||
// Note that this does not work with multi-stage modules.
|
||||
const bool use_stage_info_;
|
||||
};
|
||||
|
||||
} // namespace opt
|
||||
|
||||
@ -74,7 +74,7 @@ OpExtension "SPV_KHR_non_semantic_info"
|
||||
; CHECK: OpExtension "SPV_KHR_storage_buffer_storage_class"
|
||||
OpMemoryModel Logical GLSL450
|
||||
OpEntryPoint Fragment %2 "MainPs" %3 %4
|
||||
; CHECK: OpEntryPoint Fragment %2 "MainPs" %3 %4 %gl_FragCoord
|
||||
; CHECK: OpEntryPoint Fragment %2 "MainPs" %3 %4
|
||||
OpExecutionMode %2 OriginUpperLeft
|
||||
%5 = OpString "Color is %vn"
|
||||
)";
|
||||
@ -87,8 +87,6 @@ OpDecorate %7 DescriptorSet 0
|
||||
OpDecorate %7 Binding 0
|
||||
OpDecorate %3 Location 0
|
||||
OpDecorate %4 Location 0
|
||||
; CHECK: OpDecorate %gl_FragCoord BuiltIn FragCoord
|
||||
; CHECK: OpDecorate %_runtimearr_uint ArrayStride 4
|
||||
)" + kOutputDecorations;
|
||||
|
||||
const std::string globals =
|
||||
@ -109,10 +107,7 @@ OpDecorate %4 Location 0
|
||||
%_ptr_Output_v4float = OpTypePointer Output %v4float
|
||||
%4 = OpVariable %_ptr_Output_v4float Output
|
||||
; CHECK: %uint = OpTypeInt 32 0
|
||||
; CHECK: %_ptr_Input_v4float = OpTypePointer Input %v4float
|
||||
; CHECK: %gl_FragCoord = OpVariable %_ptr_Input_v4float Input
|
||||
; CHECK: %v4uint = OpTypeVector %uint 4
|
||||
; CHECK: [[func_type:%\w+]] = OpTypeFunction %void %uint %uint %v4uint %uint %uint %uint %uint %uint
|
||||
; CHECK: [[func_type:%\w+]] = OpTypeFunction %void %uint %uint %uint %uint %uint %uint %uint
|
||||
; CHECK: %_runtimearr_uint = OpTypeRuntimeArray %uint
|
||||
)" + kOutputGlobals + R"(
|
||||
; CHECK: %_ptr_StorageBuffer_uint = OpTypePointer StorageBuffer %uint
|
||||
@ -138,12 +133,7 @@ OpDecorate %4 Location 0
|
||||
; CHECK: {{%\w+}} = OpBitcast %uint {{%\w+}}
|
||||
; CHECK: {{%\w+}} = OpCompositeExtract %float %25 3
|
||||
; CHECK: {{%\w+}} = OpBitcast %uint {{%\w+}}
|
||||
; CHECK: {{%\w+}} = OpLoad %v4float %gl_FragCoord
|
||||
; CHECK: {{%\w+}} = OpBitcast %v4uint {{%\w+}}
|
||||
; CHECK: {{%\w+}} = OpCompositeExtract %uint {{%\w+}} 0
|
||||
; CHECK: {{%\w+}} = OpCompositeExtract %uint {{%\w+}} 1
|
||||
; CHECK: {{%\w+}} = OpCompositeConstruct %v4uint %uint_4 {{%\w+}} {{%\w+}} %uint_0
|
||||
; CHECK: {{%\w+}} = OpFunctionCall %void %inst_printf_stream_write_5 %uint_23 %uint_36 {{%\w+}} %uint_5 {{%\w+}} {{%\w+}} {{%\w+}} {{%\w+}}
|
||||
; CHECK: {{%\w+}} = OpFunctionCall %void %inst_printf_stream_write_5 %uint_23 %uint_36 %uint_5 {{%\w+}} {{%\w+}} {{%\w+}} {{%\w+}}
|
||||
; CHECK: OpBranch {{%\w+}}
|
||||
; CHECK: {{%\w+}} = OpLabel
|
||||
OpStore %4 %25
|
||||
@ -155,7 +145,6 @@ OpFunctionEnd
|
||||
; CHECK: %inst_printf_stream_write_5 = OpFunction %void None {{%\w+}}
|
||||
; CHECK: [[sw_shader_id:%\w+]] = OpFunctionParameter %uint
|
||||
; CHECK: [[sw_inst_idx:%\w+]] = OpFunctionParameter %uint
|
||||
; CHECK: [[sw_stage_info:%\w+]] = OpFunctionParameter %v4uint
|
||||
; CHECK: [[sw_param_1:%\w+]] = OpFunctionParameter %uint
|
||||
; CHECK: [[sw_param_2:%\w+]] = OpFunctionParameter %uint
|
||||
; CHECK: [[sw_param_3:%\w+]] = OpFunctionParameter %uint
|
||||
@ -163,8 +152,8 @@ OpFunctionEnd
|
||||
; CHECK: [[sw_param_5:%\w+]] = OpFunctionParameter %uint
|
||||
; CHECK: {{%\w+}} = OpLabel
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_1
|
||||
; CHECK: {{%\w+}} = OpAtomicIAdd %uint {{%\w+}} %uint_4 %uint_0 %uint_12
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_12
|
||||
; CHECK: {{%\w+}} = OpAtomicIAdd %uint {{%\w+}} %uint_4 %uint_0 %uint_8
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_8
|
||||
; CHECK: {{%\w+}} = OpArrayLength %uint [[output_buffer_var]] 2
|
||||
; CHECK: {{%\w+}} = OpULessThanEqual %bool {{%\w+}} {{%\w+}}
|
||||
; CHECK: OpSelectionMerge {{%\w+}} None
|
||||
@ -172,42 +161,26 @@ OpFunctionEnd
|
||||
; CHECK: {{%\w+}} = OpLabel
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_0
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_2 {{%\w+}}
|
||||
; CHECK: OpStore {{%\w+}} %uint_12
|
||||
; CHECK: OpStore {{%\w+}} %uint_8
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_1
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_2 {{%\w+}}
|
||||
; CHECK: OpStore {{%\w+}} [[sw_shader_id]]
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_2
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_2 {{%\w+}}
|
||||
; CHECK: OpStore {{%\w+}} [[sw_inst_idx]]
|
||||
; CHECK: {{%\w+}} = OpCompositeExtract %uint [[sw_stage_info]] 0
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_3
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_2 {{%\w+}}
|
||||
; CHECK: OpStore {{%\w+}} {{%\w+}}
|
||||
; CHECK: {{%\w+}} = OpCompositeExtract %uint [[sw_stage_info]] 1
|
||||
; CHECK: OpStore {{%\w+}} [[sw_param_1]]
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_4
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_2 {{%\w+}}
|
||||
; CHECK: OpStore {{%\w+}} {{%\w+}}
|
||||
; CHECK: {{%\w+}} = OpCompositeExtract %uint [[sw_stage_info]] 2
|
||||
; CHECK: OpStore {{%\w+}} [[sw_param_2]]
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_5
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_2 {{%\w+}}
|
||||
; CHECK: OpStore {{%\w+}} {{%\w+}}
|
||||
; CHECK: {{%\w+}} = OpCompositeExtract %uint [[sw_stage_info]] 3
|
||||
; CHECK: OpStore {{%\w+}} [[sw_param_3]]
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_6
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_2 {{%\w+}}
|
||||
; CHECK: OpStore {{%\w+}} {{%\w+}}
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_7
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_2 {{%\w+}}
|
||||
; CHECK: OpStore {{%\w+}} [[sw_param_1]]
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_8
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_2 {{%\w+}}
|
||||
; CHECK: OpStore {{%\w+}} [[sw_param_2]]
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_9
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_2 {{%\w+}}
|
||||
; CHECK: OpStore {{%\w+}} [[sw_param_3]]
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_10
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_2 {{%\w+}}
|
||||
; CHECK: OpStore {{%\w+}} [[sw_param_4]]
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_11
|
||||
; CHECK: {{%\w+}} = OpIAdd %uint {{%\w+}} %uint_7
|
||||
; CHECK: {{%\w+}} = OpAccessChain %_ptr_StorageBuffer_uint [[output_buffer_var]] %uint_2 {{%\w+}}
|
||||
; CHECK: OpStore {{%\w+}} [[sw_param_5]]
|
||||
; CHECK: OpBranch {{%\w+}}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user