This adds function and block layout checks to the validator. Very
basic CFG code has been added to make sure labels and branches
are correctly ordered.
Also:
* MemoryModel and Variable instruction checks/tests
* Use spvCheckReturn instead of CHECK_RESULT
* Fix invalid SSA tests
* Created libspirv::spvResultToString in diagnostic.h
* Documented various functions and classes
* Fixed error messages
* Fixed using declaration for FunctionDecl enum class
This adds half-precision constants to spirv-tools.
16-bit floats are always disassembled into hex-float format,
but can be assembled from floating point or hex-float inputs.
Change the offending class to more closely follow Google C++ style:
- Member names have a trailing underscore.
- Use an accessor method for the stream_ member.
If we later add a source/ as an -I include directory,
then avoid confusing other headers that want to include the
standard "endian.h" from /usr/include.
Also rename source/endian.cpp to source/spirv_endian.cpp
* Validates module level instructions for logical layout
conformance
* Does not validate:
1. Function logical layout
2. Minor cases with OpVariable
3. Missing MemoryModel instruction in module
4. Order of function definition and function declaration
* 782 unit tests for logical layout
Addressed feedback
Most uses of an ID must occur after the definition
of the ID. Forward references are allowed for
things like OpName, OpDecorate, and various cases
of control-flow instructions such as OpBranch, OpPhi,
and OpFunctionCall.
TODO: Use CFG analysis for SSA checks. In particular,
an ID defined inside a function body is only usable inside
that function body. Also, use dominator info to catch
some failing cases.
Also:
* Validator test cases use (standard) assignment form.
* Update style to more closely follow the Google C++ style guide
* Remove color-diagnostics flag.
This is enabled by default on terminals with color. Prints
hidden ASCII for terminals that can't handle color(Emacs)
* Pass functors to SSAPass to check if the
operand can be forward referenced based on its index value
* Return SPV_ERROR_INVALID_ID for ID related errors
spvBinaryParse returned SPV_ERROR_INVALID_BINARY for all types of
errors. Since spvBinaryParse does some ID validation, this was
returning inappropriate error codes for some tests.
* Common fixture for validation tests.
It only runs certian validation passes.
* Add a SPV_VALIDATE_SSA_BIT for testing purposes
* Fixtures now return error codes
* Add OpName support in diag message and unit tests
* Binary parsing can fail with invalid ID or invalid binary error code
Tests include:
* OpDecorate
* OpName
* OpMemberName
* OpBranchConditional
* OpSelectionMerge
* OpMemberDecorate
* OpGroupDecorate
* OpDeviceEnqueue
* Enable several tests failing in ID validation.
This is a grammar fix. The Decoration operand of OpDecorate (and
OpMemberDecorate) determines the remaining operands. Don't just
allow any number of literal numbers as operands.
(The OperandVariableLiterals operand class as the last member
of the OpDecorate and OpMemberDecorate entries in in opcode.inc is
an artifact of how the spec generates the opcode descriptions. It's
not suitable for parsing those instructions.)
Fixes https://github.com/KhronosGroup/SPIRV-Tools/issues/34
Add unit tests for all diagnostics issued by spvBinaryParse.
Handle image format operands in the binary parser and the
disassembler.
Document that the callback function pointers can be null,
in which case they are ignored.
Detect exhaustion of input when parsing an operand,
to avoid buffer overruns on some invalid input cases.
Fix the description strings for some operand types.
Make the diagnostic messages for those operand types
consistent between the assembler and binary parser.
Fixes https://github.com/KhronosGroup/SPIRV-Tools/issues/29
Add members:
- words: a pointer to an array of words in the instruction,
in host native endianness.
- num_words: sizes the words member
Remove member:
- offset
This simplifies clients of spvBinaryParse, because they don't
have to handle endianness translation.
Also, it makes the binary parse API more composable, allowing
for easy chaining of binary parse clients. A binary parse client
is handed the array of words directly instead of having to reference
some external array of all the words in the SPIR-V binary. It also
allows a binary parse client to mutate the instruction stream before
handing off to a downstream consumer.
TODO(dneto): Still need to write the unit tests for spvBinaryParse
Fixes: https://github.com/KhronosGroup/SPIRV-Tools/issues/1
Fixing some C++ conversion errors.
* Implicit conversion from int to bool.
* Implicit conversion from size_t to uint32_t.
* Implicit conversion from char* to uint8_t.
Adding no-op color operators so unhandled platforms can still link.
- Removed dead configuration in CMakeLists.txt.
- Used target_compile_options() instead of CMAKE_{C|CXX}_FLAGS.
- Turned on warnings on tests.
- Fixed various warnings for comparing signed with unsigned values.
- Removed dead code exposed by compiler warnings.
Don't use SYSTEM attribute on include_directories directive
for the SPIR-V standard header files. When you do, object files
are not considered dependent on those headers.
Checked by looking at the dependency file source/disassemble.cpp.o.d,
and by trying to compile after a trivial edit to spirv.h
Fixes https://github.com/KhronosGroup/SPIRV-Tools/issues/7
Also, use "" inclusion instead of <> inclusion for standard SPIR-V
headers.
Bits 24-31: 0
Bits 16-23: SPIR-V major number (1)
Bits 8-15: SPIR-V minor number (0)
Bits 0-7: SPIR-V minor number (2)
The assembler will construct the word appropriately,
and the disassemble will print it in major.minor.revision form.
The high 16-bits are a registered generator tool.
These are registered at
https://www.khronos.org/registry/spir-v/api/spir-v.xml
The low 16-bits are tool-specific. It might be a version number,
for example, but is not constrained by the spec or by the registration
process.
The disassembler prints the tool name when we know it.
If we don't, print "Unknown" and then the numeric tool number
in parentheses.
In all cases, the disassembler prints lower 16-bit number on the
same line but after the tool name.
Also add newly registered generators:
6: Khronos LLVM/SPIR-V Translator
7: Khronos SPIR-V Tools Assembler
Decoration Stream depends on it.
GeometryStreams depends on Geometry capability.
Spot check dependence of OpEmitStreamVertex on GeometryStreams.
(Opcode dependencies on capabilities are automatically generated from
opcode.inc)
Previously the opcode table is declared as an global array and we
have spvOpcodeTableInitialize() modifying it. That can result in
race condition. Now spvOpcodeTabelGet() copies the whole underlying
array.
Updated readme.
Note: The header advertises itself as Rev 1, but contains
many (all?) the updates intended for Rev 2. We might need
to update one more time before SPIR-V 1.0 Rev2 is published.
Regenerated syntax tables for 1.0.
Changed names:
InputTriangles -> Triangles
InputQuads -> Quads
InputIsolines -> Isolines
WorkgroupLocal -> Workgroup
WorkgroupGlobal -> CrossWorkgroup
PrivateGlobal -> Private
(Dim) InputTarget -> SubpassData
WorkgroupLocalMemoryMask -> WorkgroupMemoryMask
WorkgroupGlobalMemoryMask -> CrossWorkgroupMemoryMask
AsyncGroupCopy -> GroupAsyncCopy
WaitGroupEvents -> GroupWaitEvents
Remove:
IndependentForwardProgress capability
Smooth decoration
FragColor BuiltIn
WorkgroupLinearId in favour of LocalInvocationId
ImageSRGBWrite capability
Special OpenCL image instructions
Add:
image channel data type UnormInt101010_2
AcquireReleaseMask
InputTargetIndex updates:
InputTargetIndex -> InputAttachmentIndex
InputAttachmentIndex depends on InputAttachment capability,
and it takes a literal number argument.
Capability StorageImageExtendedFormats updates:
Enum value changed from 26 to 49. (Changes position in tables).
Replaces AdvancedImageFormat capability.
OpenCL source language -> OpenCL_C, OpenCL_CPP
