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Author SHA1 Message Date
André Perez
e8ce4355ae
spirv-fuzz: Add bit instruction synonym transformation (#3775) 
This PR implements part of the add bit instruction synonym transformation.
For now, the implementation covers the OpBitwiseOr, OpBitwiseXor and
OpBitwiseAnd cases.
 2020-09-15 23:36:23 +01:00