Commit Graph

2127 Commits

Author SHA1 Message Date
Spencer Fricke
e2cf769302
spirv-val: Label VUID 06925 (#4852) 2022-07-13 10:05:52 -04:00
Greg Fischer
faa8d6a653
Revert "Optimize DefUseManager allocations (#4709)" (#4846)
This reverts commit d18d0d92e5.

This is reverted because it causes a 7X slowdown when legalizing
SPIR-V with NonSemantic.Shader.DebugInfo.100 instructions.
This is due to the creation of very large UseLists for several
heavily used operands for this extension combined with the fact
that the original commit changed the performance of Uselists to O(n).
2022-07-12 13:14:47 -06:00
Spencer Fricke
bc5c8760af
spirv-val: Add Vulkan decoration interface (#4831) 2022-07-07 13:03:52 -04:00
alan-baker
05de650371
Use structural reachability in CFG checks (#4849)
Fixes https://crbug.com/oss-fuzz48578

* Adds structural reachability to basic blocks
  * calculated in same manner as reachability, but using structural
    successors
* Change structured CFG validation to use structural reachability
  instead of reachability
* Fix some invalid reducer cases
2022-07-06 17:43:32 -04:00
David Neto
dcee3a5de0
Update validator diagnostics with "structurally dominated" (#4844)
The updated rules in SPIR-V 1.6 Rev2 use structural dominance,
so update the messages to match
2022-07-06 15:10:29 -04:00
Steven Perron
92fe420c8a
Reduce load size does not work for array with spec const size (#4845)
Arrays do not have to have a size that is known at compile time.  It
could be a spec constant.  In these cases, treat the array
as if it is arbitrarily long.  This commit will treat it like it is an
array of size UINT32_MAX.

Fixes https://crbug.com/oss-fuzz/47397.
2022-07-05 16:16:50 -04:00
Steven Perron
d5a3bfcf2f
Avoid undefined behaviour when getting debug opcode (#4842)
If the `instruction` operand in an extended instruction instruction is
too large, it causes undefined behaviour when that value is cast to the
enum for the corresponding set.  This is done with the
NonSemanticDebug100 instruction set.  We need to avoid the undefined
behaviour.

Fixes #4727
2022-07-05 14:14:29 -04:00
Steven Perron
32622ba7c6
DCE: clean up the cfg for all functions that were processed. (#4840)
Which functions are processed is determined by which ones are on the
call tree from the entry points before dead code is removed.  So it is
possible that a function is process because it is called from an entry
point, but the CFG is not cleaned up because the call to the function
was removed.

The fix is to process and cleanup every function in the module.  Since
all of the dead functions would have already been removed in an earlier
step of DCE, it should not make a different in compile time.

Fixes #4731
2022-07-05 12:23:32 -04:00
alan-baker
286e9c1187
Use structural dominance to validate cfg (#4832)
* Structural dominance introduced in SPIR-V 1.6 rev2
* Changes the structured cfg validation to use structural dominance
  * structural dominance is based on a cfg where merge and continue
    declarations are counted as graph edges
* Basic blocks now track structural predecessors and structural
  successors
* Add validation for entry into a loop
* Fixed an issue with inlining a single block loop
  * The continue target needs to be moved to the latch block
* Simplify the calculation of structured exits
  * no longer requires block depth
* Update many invalid tests
2022-06-29 23:32:20 -04:00
Mike
0b824324bc
Fix segfault in SpirvTools::Disassemble when printing (#4833)
When the `SPV_BINARY_TO_TEXT_OPTION_PRINT` option is specified, `spvtext` will not be created (see 37d2396cab/source/disassemble.cpp (L117)), and the attempt to dereference into its members (`spvtext->str` and `spvtext->length`) results in segmentation fault.

This is fixed by first checking if `spvtext` is nulll.

Co-authored-by: Steven Perron <stevenperron@google.com>
2022-06-29 12:05:00 -04:00
Steven Perron
66d88508dd
Build struct order only for the section needed when unrolling. (#4830)
We currently build the structured order for all nodes reachable from the
loop header when unrolling a loop.  However, unrolling only needs the
nodes in the loop and possibly the merge node.

To avoid needless computation, I have implemented a search that will
stop at the merge node.

Fixes #4827
2022-06-29 09:53:26 -04:00
Steven Perron
37d2396cab
Fix SplitLoopHeader to handle single block loop (#4829)
The code in `CFG::SplitLoopHeader` assumes the loop header is not the
latch.  This leads to it not being able to find the latch block.  This
has been fixed, and a test added.

Fixes #4527
2022-06-24 12:33:45 -04:00
Steven Perron
3c9fd7577f
Avoid if-conversion if both predecessors are the same (#4826)
If the predecessor blocks are the same, then there is only 1 value for the
OpPhi.  The simplition pass will simplify it, and it causes problems for
if-conversion.  In these cases, if-conversion can just punt.

Fixes #3554.
2022-06-24 15:28:06 +00:00
Steven Perron
76fe352190
Fail validation when RelaxedPrecision is applied to a type. (#4823)
* Fail validation when RelaxedPrecision is applied to a type.

Fixes #4723
Fixes #4725

* Fixup invalid test
2022-06-21 19:59:01 +00:00
David Neto
2eff41e707
Remove stray output to stdout from tests (#4816) 2022-06-20 10:57:44 -04:00
manas-kulkarni
fbcb6cf4c8
Ability to fold Constant Vector times Matrix and Matrix times vector instructions (#4818) 2022-06-16 13:54:12 -04:00
Spencer Fricke
bfc611b03e
spirv-val: Label 06807 and 06808 VUID (#4817) 2022-06-15 11:25:16 -04:00
Steven Perron
76ebfb989f
Avoid replacing access chain with OOB access (#4819)
An access chain could have a constant index that is an out of bounds
access.  This is valid spir-v, even if it can cause problems at runtime.
However, it is not valid to have an OpCompositeExtract with an out of
bounds access.  This means we have to stop local-access-chain-convert
from making that change.

Fixes #4605
2022-06-14 13:06:38 -04:00
David Neto
8f7f5024f8
Simplify invocation of snprintf (#4815) 2022-06-10 17:55:45 -04:00
Junda Liu
044ff1aabf
spirv-val: Add support for SPV_AMD_shader_early_and_late_fragment_tests (#4812)
- Update SPIR-V headers.
- Add validator support.
- Add validator tests.
2022-06-08 08:36:32 -04:00
Shahbaz Youssefi
c94501352d
spirv-val: Optimize struct field decoration lookup (#4809)
A std::set is used instead of std::vector, where the elements are
ordered by member index first.  Decorations for fields are now looked up
by going over the range of decorations for the member only, instead of
the whole set.

In an ANGLE test that generates a struct with 4096 members, validation
goes down from ~140ms to ~90ms.  On debug builds, the difference is more
pronounced, going down from ~2.5s to ~600ms.
2022-06-02 11:32:38 -04:00
Nicolas Capens
130a05d2e3
Fold multiply and subtraction into FMA with negation (#4808)
This change adds a folding rule which transforms x * y - a and a - x * y
into FMA(x, y, -a) and FMA(-x, y, a), respectively.

While the SPIR-V instruction count remains the same, target instruction
sets typically feature FMA instruction variants that can negate an
operand. Also this transformation may unlock further optimizations which
eliminate the negation.

(Google bug: b/226145988)
2022-05-31 12:03:56 -04:00
Spencer Fricke
82d91083cb
spirv-val: Add PerVertexKHR (#4807) 2022-05-26 13:11:05 -04:00
Steven Perron
088cb1a5c8
Add more folding for composite instructions (#4802)
* Add move folding for composite instructions

Fold chains of insert into construct

If a chain of OpCompositeInsert instruction write to every element of a
composite object, then we can replace it with an OpCompositeConstruct.

Fold a construct fed by extracts to a single extract

We already fold an OpCompositeConstruct when it is simlpy reconstructing
an object that was decomposed by a series of OpCompositeExtract
instructions.  However, we do not do that if that object is an element
of a larger object.

I have updated the rule, so that if the original object is a an element
of a larger object, then the OpCompositeConstruct is replaced with a
single OpCompositeExtract from the larger object.

Fixes #4371.
2022-05-26 10:29:02 -04:00
stu-s
c267127846
Add SPV_KHR_fragment_shader_barycentric support (#4805)
* Add SPV_KHR_fragment_shader_barycentric support
2022-05-25 09:20:39 -04:00
Steven Perron
f74b85853c
Handle 64-bit integers in local access chain convert (#4798)
* Handle 64-bit integers in local access chain convert

The local access chain convert pass does on run on module that have
64-bit integers, even if they have nothing to to with access chains.
This is very limiting because other passes rely on the access chains
being removed. So this commit will add this functionality to the pass.
2022-05-10 17:02:14 +00:00
Daniele Vettorel
f7a6e3b9d5
Handle chains of OpAccessChain in replacing variable index access for flattened resources. (#4797) 2022-05-10 11:41:43 -04:00
Jaebaek Seo
ad3514b732
spirv-opt: add pass for interface variable scalar replacement (#4779)
Replace shader's stage variables whose types are array or matrix
with scalars/vectors.
For example,
```
Before:
  %foo = OpVariable %_ptr_Output__arr_v2float_uint_4 Output
After:
  %foo = OpVariable %_ptr_Output_v2float Output
  %foo_0 = OpVariable %_ptr_Output_v2float Output
  %foo_1 = OpVariable %_ptr_Output_v2float Output
  %foo_2 = OpVariable %_ptr_Output_v2float Output
```
2022-05-09 14:04:52 -04:00
JiaoluAMD
c11ea09652
spirv-opt : Add FixFuncCallArgumentsPass (#4775)
spirv validation require OpFunctionCall with memory object, usually this
is non issue as all the functions are inlined.
This pass deal with some case for
DontInline function. accesschain input operand would be replaced new
created variable
2022-05-06 10:39:26 -04:00
Daniel Koch
9e377b0f97
spirv-val: Add CullMaskKHR support (#4792)
Co-authored-by: sfricke-samsung <s.fricke@samsung.com>
2022-05-06 07:32:56 -04:00
Kévin Petit
7014be600c
Add support for SPV_KHR_subgroup_rotate (#4786)
- Add assembler/disassembler support
- Add validator support

Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: Iffcedd5d5e636a0e128a5906ffe634dd85727de1
2022-05-05 08:58:05 -04:00
JiaoluAMD
2c7fb9707b
Handle dontinline function in spread-volatile-semantics (#4776)
Handle function calls in spread-volatile-semantics
2022-05-04 10:52:58 -04:00
Steven Perron
1295dca8e2
Reapply "Add folding rule to generate Fma instructions (#4783)" (#4789)
This reverts commit 671f6e633f.

PR #4783 was reverted because it caused OpenCL CTS failures for clvk.
The was in clspv, which was not adding the no contract decoration when
it was required.  This has been fixed in
https://github.com/google/clspv/pull/845.  We can now reapply #4783.
2022-05-03 10:20:23 -04:00
Karol Herbst
edaf51038b
linker: Recalculate interface variables (#4784)
* linker: Recalculate interface variables

By resolving extern symbols Entry Points might access variables they
hadn't declared before.

* test/linker: add test to verify linked spir-vs importing functions validate

Without the fix Validate will complain about:

"ERROR: 9: Interface variable id <5> is used by entry point 'bar' id <1>, but is not listed as an interface\n  %5 = OpVariable %_ptr_Input_v3uint Input\n"
2022-05-03 13:23:02 +00:00
sindney
46492aa45a
spirv-opt: skips if_conversion when dontflatten is set (#4770) 2022-04-28 19:26:02 +00:00
Daniele Vettorel
671f6e633f
Revert "Add folding rule to generate Fma instructions (#4783)" (#4785)
This reverts commit 2b2b0282af.
2022-04-20 10:55:20 -04:00
Steven Perron
2b2b0282af
Add folding rule to generate Fma instructions (#4783)
Adding Fma instruction can speed up the code.  This was requested by
swiftshader, so they do not have to do this analysis themselves.  It can
also help reduce the code size, and the work the ICD compilers have to
do.
2022-04-19 11:25:07 -04:00
Steven Perron
92c17edde7
Don't try to unroll loop with step count 0. (#4769)
These loop are infinite loop, so there is no reason to unroll the loop.
Fixes #4711.
2022-04-11 10:21:15 -04:00
Shahbaz Youssefi
5760114d77
spirv-diff: Fix OpTypeFunction matching w.r.t operand count (#4771)
The code accidentally expected OpTypeFunction operand count to match.
This is fixed so that OpTypeFunction instructions with different operand
counts are considered not matching.
2022-04-01 09:04:26 -04:00
Shahbaz Youssefi
bd325d2984
spirv-diff: Basic support for OpTypeForwardPointer (#4761)
Currently, the diff tool matches types bottom up, so on every
instruction it expects to know if its operands are already matched or
not.  With cyclical references, it cannot know that.  Type matching
would need significant rework to be able to support such a use case; for
example, it may need to maintain a set of plausable matches between type
pointers that are forward-referenced, and potentially back track when
later the types turn out to be incompatible.

In this change, OpTypeForwardPointer is supported in the more common and
trivial case.  Firstly, forwarded type pointers are only matched if they
have they have the same storage class and point to the same type opcode:

- In the presence of debug info, matching is done only if the names are
  unique in both src and dst.
- In the absence of debug info, matching is done only if there is only
  one possible matching.

Fixes: #4754
2022-03-28 17:01:07 +00:00
sfricke-samsung
0c670ef1d9
spirv-as: Add opcode name when possible (#4757) 2022-03-28 14:46:39 +00:00
Jaebaek Seo
05745cc9d4
Handle shaders without execution model in spread-volatile-semantics (#4766)
spread-volatile-semantics pass spreads Volatile semantics for builtin
variables used by certain execution models based on
VUID-StandaloneSpirv-VulkanMemoryModel-04678 and
VUID-StandaloneSpirv-VulkanMemoryModel-04679 (See "Standalone SPIR-V
Validation" section of Vulkan spec "Appendix A: Vulkan Environment for
SPIR-V"). Therefore, shaders without execution model (e.g., used only
for linkage) are not the target of the pass. This commit lets the pass
just return SuccessWithoutChange in that case.
2022-03-25 17:54:46 +00:00
sfricke-samsung
fa5d424830
spirv-val: Add more Vulkan VUID labels (#4764) 2022-03-25 09:29:19 -04:00
Nikita
a3fbc9331b
Support SPV_KHR_uniform_group_instructions (#4734) 2022-03-25 08:32:50 -04:00
sfricke-samsung
90728d2dff
spirv-val: Clean up VariablePointers logic (#4755) 2022-03-24 12:02:29 -04:00
sfricke-samsung
b3c1790632
spirv-val: Add Vulkan 32-bit bit op Base (#4758) 2022-03-23 13:55:42 -04:00
sfricke-samsung
9668d2e4e4
spirv-val: Label and add test for PSB Aligned (#4756) 2022-03-23 11:08:21 -04:00
Greg Fischer
9d1b572884
spirv-opt: (WIP) Eliminate Dead Input Component Pass (#4720)
This adds the --eliminate-dead-input-components pass which currently
removes trailing unused components from input arrays.

Fixes #4532
2022-03-22 20:50:52 -06:00
sfricke-samsung
f8cd51431e
spirv-val: Add better error code for invalid operand (#4753) 2022-03-22 15:37:38 -04:00
sfricke-samsung
7963fa13c7
spirv-val: Add Vulkan Dref not allowed 3D dim VUID (#4751) 2022-03-10 13:08:26 -05:00