Commit Graph

2154 Commits

Author SHA1 Message Date
Spencer Fricke
f5b27b6513
spirv-diff: Allow no SpecId (#4904) 2022-09-07 15:14:26 -04:00
Spencer Fricke
59cf5b1346
spirv-val: consider OpEmitMeshTasksEXT a terminator instruction (#4923) 2022-09-07 15:12:07 -04:00
Spencer Fricke
934a059787
spirv-val: Label Builtin Array Test VUIDs (#4921) 2022-09-07 10:29:38 -04:00
Pankaj Mistry
4c456f7da6
Implement tool changes for SPV_EXT_mesh_shader. (#4915)
- Added validation rule to support EXT_mesh_shader from SPIRV 1.4 onwards
2022-09-01 20:36:15 -04:00
jeremyg-lunarg
33113abf45
Instrument: Add OpNames to generated functions and variables (#4873)
Add name annotations to the generated instrumentation code to
make it easier to understand. Example spirv-cross output:

    vec4 _140;
    if (0u < inst_bindless_direct_read_4(0u, 0u, 1u, uint(_19)))
    {
        _140 = texture(textures[nonuniformEXT(_19)], inUV);
    }
    else
    {
        inst_bindless_stream_write_4(50u, 1u, uint(_19), 0u);
        _140 = vec4(0.0);
    }
2022-09-01 18:32:00 +00:00
Steven Perron
d51dc53d2c
Improve algorithm to reorder blocks in a function (#4911)
* Improve algorithm to reorder blocks in a function

In dead branch elimination, blocks can end up in a the wrong order, so
there is code to reorder the blocks in structured order.  The problem is
that the algorithm to do that is very poor.  It involves many searchs in
the function for the correct position to place the block, as well as
moving many block in the vector.

The solution is to write a specialized function in the function class
that will reorder the blocks in structured order.  After computing the
structured order, reordering the block can be done in linear time, with
very little overhead.
2022-08-31 11:06:15 -04:00
Spencer Fricke
fca39d5cb4
spirv-val: Better message for using OpTypeBool in input/output (#4901) 2022-08-29 12:47:16 -04:00
Spencer Fricke
f76431cbaf
spirv-val: Add SPV_KHR_ray_tracing storage class (#4868)
* Added VUID labels
2022-08-29 11:09:06 -04:00
jeremyg-lunarg
a98f05d02f
tests: Make InstrumentPass tests use SinglePassRunAndMatch<> and stateful pattern matching (#4897)
Using SinglePassRunAndMatch<> instead of SinglePassRunAndCheck<>
makes tests more concise and makes it possible to use pattern
matching features.

Using Effcee stateful pattern matching to make it less repetitive
to check for generated functions and global variables.

This approach isn't worth
it for DebugPrintf functions because the generated code will change
depending on how many parameters are passed to every debugPrintfEXT()
call.
2022-08-23 12:28:00 -06:00
Spencer Fricke
3c1a14b2b6
spirv-val: SBT Index for OpExecuteCallableKHR (#4900) 2022-08-18 13:42:25 -04:00
Spencer Fricke
0073a1fa36
spirv-val: Remove ImageWrite Texel todo (#4899) 2022-08-17 11:37:05 -04:00
Greg Fischer
71b2aee6c8
Add structs to eliminate dead input components (#4894)
Will eliminate all trailing members of input struct that are not
referenced.
2022-08-16 11:31:04 -04:00
Nathan Gauër
1728c1d40a
spirv-opt: fix copy-propagate-arrays index opti on structs. (#4891)
* spirv-opt: fix copy-propagate-arrays index opti on structs.

As per SPIR-V spec:
OpAccessChain indices must be OpConstant when indexing into a structure.

This optimization tried to remove load cascade. But in some scenario
failed:

```c
cbuffer MyStruct {
    uint my_field;
};

uint main(uint index) {
    const uint my_array[1] = { my_field };
    return my_array[index]
}
```

This is valid as the struct is indexed with a constant index, and then
the array is indexed using a dynamic index.
The optimization would consider the local array to be useless and
generated a load directly into the struct.

* spirv-opt: prevent creation of unused instructions

Copy-propagate-arrays optimization pass would create unused constants,
even if the optimization not completed.
This was caused by the way we handled OpAccessChain squashing: we
only referenced constants, and had to create them upfront.

Fixes #4887
Signed-off-by: Nathan Gauër <brioche@google.com>
2022-08-16 16:05:47 +02:00
Greg Fischer
9abacb34a5
Fix ADCE to not eliminate top level DebugInfo instructions (#4889)
Specifically, DebugSourceContinued, DebugCompilationUnit, and
DebugEntryPoint. These instructions are top-level instructions
which do not or may not have a user except for the tool and so
should not be eliminated.
2022-08-15 15:23:23 -06:00
Cassandra Beckley
3a8a961cff
Fix array copy propagation (#4890)
Array copy propagation was interpreting OpEntryPoint as a store
2022-08-11 09:59:37 -07:00
Steven Perron
0a43a84e02
Fix shuffle feeding shuffle with undef literal (#4883)
When folding a vector shuffle with an undef literal, it is possible that the
literal is adjusted so that it will then be interpreted as an index into
the input operands.  This is fixed by special casing that case, and not
adjusting those operands.

Fixes #4859
2022-08-10 09:04:35 -04:00
Steven Perron
ed3b9c83b1
Local access chain convert: check for negative indexes (#4884)
An access chain instruction interpretes its index operands as signed.
The composite insert and extract instruction interpret their index
operands as unsigned, so it is not possible to represent a negative
number.

This commit adds a check to the local-access-chain-convert pass to check
for a negative number in the access chain and to not do the conversion.

Fixes #4856
2022-08-09 17:33:04 +00:00
Spencer Fricke
f20e8d05f5
spirv-val: Add SPV_KHR_ray_tracing instructions (#4871) 2022-08-08 14:45:04 -04:00
Spencer Fricke
08c542d344
spirv-val: Label VUID 06997 (#4881) 2022-08-03 10:42:13 -04:00
alan-baker
b5d0bf285f
Require ColMajor or RowMajor for matrices (#4878)
Fixes #4875

* Require that matrices in laid out structs have RowMajor or ColMajor
  set as per SPIR-V section 2.16.2 (shader validation)
2022-07-29 15:08:48 -04:00
alan-baker
4773879b68
Update structure layout validation (#4876)
* Uniform block layout rules for matrices should use extended layouts by
  default
2022-07-29 10:16:54 -04:00
David Neto
8dc0030ecb
spirv-as: Avoid overflow when parsing exponents on hex floats (#4874)
* spirv-as: Avoid overflow when parsing exponents on hex floats

When an exponent is so large that it would overflow the int
type in the parser, saturate the exponent.
This allows extremely large exponents, and saturates
to infinity when the exponent is positive, and zero when the exponent
is negative.

Fixes #4721.

* Avoid unexpected narrowing conversions from arithmetic operations

Co-authored-by: Alastair F. Donaldson <alastair.donaldson@imperial.ac.uk>
2022-07-28 09:40:07 -04:00
Spencer Fricke
cc5fca057e
spirv-val: Fix Vulkan memory scope (#4869) 2022-07-26 15:14:21 -04:00
Alastair Donaldson
388ce0ee64
spirv-as: Avoid recursion when skipping whitespace (#4866)
Excessive whitespace can lead to stack overflow during parsing as each
character of skipped whitespace involves a recursive call. An
iterative solution avoids this.

Fixes #4729.
2022-07-26 10:56:04 -04:00
Spencer Fricke
e4cfa190df
spirv-val: Add SPV_KHR_ray_query (#4848) 2022-07-20 10:12:58 -04:00
Pankaj Mistry
60615b8ec6
Implement SPV_NV_bindless_texture related changes (#4847)
* Add validation for SPV_NV_bindless_texture
2022-07-19 14:41:19 -04:00
Spencer Fricke
93ebf698a0
spirv-val: Add OpConvertUToAccelerationStructureKHR (#4838) 2022-07-15 09:55:33 -04:00
Spencer Fricke
e2cf769302
spirv-val: Label VUID 06925 (#4852) 2022-07-13 10:05:52 -04:00
Greg Fischer
faa8d6a653
Revert "Optimize DefUseManager allocations (#4709)" (#4846)
This reverts commit d18d0d92e5.

This is reverted because it causes a 7X slowdown when legalizing
SPIR-V with NonSemantic.Shader.DebugInfo.100 instructions.
This is due to the creation of very large UseLists for several
heavily used operands for this extension combined with the fact
that the original commit changed the performance of Uselists to O(n).
2022-07-12 13:14:47 -06:00
Spencer Fricke
bc5c8760af
spirv-val: Add Vulkan decoration interface (#4831) 2022-07-07 13:03:52 -04:00
alan-baker
05de650371
Use structural reachability in CFG checks (#4849)
Fixes https://crbug.com/oss-fuzz48578

* Adds structural reachability to basic blocks
  * calculated in same manner as reachability, but using structural
    successors
* Change structured CFG validation to use structural reachability
  instead of reachability
* Fix some invalid reducer cases
2022-07-06 17:43:32 -04:00
David Neto
dcee3a5de0
Update validator diagnostics with "structurally dominated" (#4844)
The updated rules in SPIR-V 1.6 Rev2 use structural dominance,
so update the messages to match
2022-07-06 15:10:29 -04:00
Steven Perron
92fe420c8a
Reduce load size does not work for array with spec const size (#4845)
Arrays do not have to have a size that is known at compile time.  It
could be a spec constant.  In these cases, treat the array
as if it is arbitrarily long.  This commit will treat it like it is an
array of size UINT32_MAX.

Fixes https://crbug.com/oss-fuzz/47397.
2022-07-05 16:16:50 -04:00
Steven Perron
d5a3bfcf2f
Avoid undefined behaviour when getting debug opcode (#4842)
If the `instruction` operand in an extended instruction instruction is
too large, it causes undefined behaviour when that value is cast to the
enum for the corresponding set.  This is done with the
NonSemanticDebug100 instruction set.  We need to avoid the undefined
behaviour.

Fixes #4727
2022-07-05 14:14:29 -04:00
Steven Perron
32622ba7c6
DCE: clean up the cfg for all functions that were processed. (#4840)
Which functions are processed is determined by which ones are on the
call tree from the entry points before dead code is removed.  So it is
possible that a function is process because it is called from an entry
point, but the CFG is not cleaned up because the call to the function
was removed.

The fix is to process and cleanup every function in the module.  Since
all of the dead functions would have already been removed in an earlier
step of DCE, it should not make a different in compile time.

Fixes #4731
2022-07-05 12:23:32 -04:00
alan-baker
286e9c1187
Use structural dominance to validate cfg (#4832)
* Structural dominance introduced in SPIR-V 1.6 rev2
* Changes the structured cfg validation to use structural dominance
  * structural dominance is based on a cfg where merge and continue
    declarations are counted as graph edges
* Basic blocks now track structural predecessors and structural
  successors
* Add validation for entry into a loop
* Fixed an issue with inlining a single block loop
  * The continue target needs to be moved to the latch block
* Simplify the calculation of structured exits
  * no longer requires block depth
* Update many invalid tests
2022-06-29 23:32:20 -04:00
Mike
0b824324bc
Fix segfault in SpirvTools::Disassemble when printing (#4833)
When the `SPV_BINARY_TO_TEXT_OPTION_PRINT` option is specified, `spvtext` will not be created (see 37d2396cab/source/disassemble.cpp (L117)), and the attempt to dereference into its members (`spvtext->str` and `spvtext->length`) results in segmentation fault.

This is fixed by first checking if `spvtext` is nulll.

Co-authored-by: Steven Perron <stevenperron@google.com>
2022-06-29 12:05:00 -04:00
Steven Perron
66d88508dd
Build struct order only for the section needed when unrolling. (#4830)
We currently build the structured order for all nodes reachable from the
loop header when unrolling a loop.  However, unrolling only needs the
nodes in the loop and possibly the merge node.

To avoid needless computation, I have implemented a search that will
stop at the merge node.

Fixes #4827
2022-06-29 09:53:26 -04:00
Steven Perron
37d2396cab
Fix SplitLoopHeader to handle single block loop (#4829)
The code in `CFG::SplitLoopHeader` assumes the loop header is not the
latch.  This leads to it not being able to find the latch block.  This
has been fixed, and a test added.

Fixes #4527
2022-06-24 12:33:45 -04:00
Steven Perron
3c9fd7577f
Avoid if-conversion if both predecessors are the same (#4826)
If the predecessor blocks are the same, then there is only 1 value for the
OpPhi.  The simplition pass will simplify it, and it causes problems for
if-conversion.  In these cases, if-conversion can just punt.

Fixes #3554.
2022-06-24 15:28:06 +00:00
Steven Perron
76fe352190
Fail validation when RelaxedPrecision is applied to a type. (#4823)
* Fail validation when RelaxedPrecision is applied to a type.

Fixes #4723
Fixes #4725

* Fixup invalid test
2022-06-21 19:59:01 +00:00
David Neto
2eff41e707
Remove stray output to stdout from tests (#4816) 2022-06-20 10:57:44 -04:00
manas-kulkarni
fbcb6cf4c8
Ability to fold Constant Vector times Matrix and Matrix times vector instructions (#4818) 2022-06-16 13:54:12 -04:00
Spencer Fricke
bfc611b03e
spirv-val: Label 06807 and 06808 VUID (#4817) 2022-06-15 11:25:16 -04:00
Steven Perron
76ebfb989f
Avoid replacing access chain with OOB access (#4819)
An access chain could have a constant index that is an out of bounds
access.  This is valid spir-v, even if it can cause problems at runtime.
However, it is not valid to have an OpCompositeExtract with an out of
bounds access.  This means we have to stop local-access-chain-convert
from making that change.

Fixes #4605
2022-06-14 13:06:38 -04:00
David Neto
8f7f5024f8
Simplify invocation of snprintf (#4815) 2022-06-10 17:55:45 -04:00
Junda Liu
044ff1aabf
spirv-val: Add support for SPV_AMD_shader_early_and_late_fragment_tests (#4812)
- Update SPIR-V headers.
- Add validator support.
- Add validator tests.
2022-06-08 08:36:32 -04:00
Shahbaz Youssefi
c94501352d
spirv-val: Optimize struct field decoration lookup (#4809)
A std::set is used instead of std::vector, where the elements are
ordered by member index first.  Decorations for fields are now looked up
by going over the range of decorations for the member only, instead of
the whole set.

In an ANGLE test that generates a struct with 4096 members, validation
goes down from ~140ms to ~90ms.  On debug builds, the difference is more
pronounced, going down from ~2.5s to ~600ms.
2022-06-02 11:32:38 -04:00
Nicolas Capens
130a05d2e3
Fold multiply and subtraction into FMA with negation (#4808)
This change adds a folding rule which transforms x * y - a and a - x * y
into FMA(x, y, -a) and FMA(-x, y, a), respectively.

While the SPIR-V instruction count remains the same, target instruction
sets typically feature FMA instruction variants that can negate an
operand. Also this transformation may unlock further optimizations which
eliminate the negation.

(Google bug: b/226145988)
2022-05-31 12:03:56 -04:00
Spencer Fricke
82d91083cb
spirv-val: Add PerVertexKHR (#4807) 2022-05-26 13:11:05 -04:00