mirror of
https://github.com/KhronosGroup/SPIRV-Tools
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1fe9bcc108
Create a pass to instrument OpDebugPrintf instructions. This pass replaces all OpDebugPrintf instructions with instructions to write a record containing the string id and the all specified values into a special printf output buffer (if space allows). This pass is designed to support the printf validation in the Vulkan validation layers. Fixes #3210
267 lines
11 KiB
C++
267 lines
11 KiB
C++
// Copyright (c) 2020 The Khronos Group Inc.
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// Copyright (c) 2020 Valve Corporation
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// Copyright (c) 2020 LunarG Inc.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "inst_debug_printf_pass.h"
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#include "spirv/unified1/NonSemanticDebugPrintf.h"
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namespace spvtools {
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namespace opt {
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void InstDebugPrintfPass::GenOutputValues(Instruction* val_inst,
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std::vector<uint32_t>* val_ids,
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InstructionBuilder* builder) {
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uint32_t val_ty_id = val_inst->type_id();
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analysis::TypeManager* type_mgr = context()->get_type_mgr();
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analysis::Type* val_ty = type_mgr->GetType(val_ty_id);
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switch (val_ty->kind()) {
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case analysis::Type::kVector: {
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analysis::Vector* v_ty = val_ty->AsVector();
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const analysis::Type* c_ty = v_ty->element_type();
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uint32_t c_ty_id = type_mgr->GetId(c_ty);
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for (uint32_t c = 0; c < v_ty->element_count(); ++c) {
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Instruction* c_inst = builder->AddIdLiteralOp(
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c_ty_id, SpvOpCompositeExtract, val_inst->result_id(), c);
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GenOutputValues(c_inst, val_ids, builder);
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}
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return;
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}
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case analysis::Type::kBool: {
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// Select between uint32 zero or one
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uint32_t zero_id = builder->GetUintConstantId(0);
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uint32_t one_id = builder->GetUintConstantId(1);
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Instruction* sel_inst = builder->AddTernaryOp(
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GetUintId(), SpvOpSelect, val_inst->result_id(), one_id, zero_id);
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val_ids->push_back(sel_inst->result_id());
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return;
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}
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case analysis::Type::kFloat: {
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analysis::Float* f_ty = val_ty->AsFloat();
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switch (f_ty->width()) {
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case 16: {
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// Convert float16 to float32 and recurse
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Instruction* f32_inst = builder->AddUnaryOp(
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GetFloatId(), SpvOpFConvert, val_inst->result_id());
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GenOutputValues(f32_inst, val_ids, builder);
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return;
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}
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case 64: {
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// Bitcast float64 to uint64 and recurse
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Instruction* ui64_inst = builder->AddUnaryOp(
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GetUint64Id(), SpvOpBitcast, val_inst->result_id());
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GenOutputValues(ui64_inst, val_ids, builder);
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return;
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}
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case 32: {
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// Bitcase float32 to uint32
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Instruction* bc_inst = builder->AddUnaryOp(GetUintId(), SpvOpBitcast,
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val_inst->result_id());
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val_ids->push_back(bc_inst->result_id());
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return;
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}
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default:
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assert(false && "unsupported float width");
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return;
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}
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}
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case analysis::Type::kInteger: {
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analysis::Integer* i_ty = val_ty->AsInteger();
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switch (i_ty->width()) {
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case 64: {
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Instruction* ui64_inst = val_inst;
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if (i_ty->IsSigned()) {
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// Bitcast sint64 to uint64
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ui64_inst = builder->AddUnaryOp(GetUint64Id(), SpvOpBitcast,
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val_inst->result_id());
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}
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// Break uint64 into 2x uint32
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Instruction* lo_ui64_inst = builder->AddUnaryOp(
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GetUintId(), SpvOpUConvert, ui64_inst->result_id());
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Instruction* rshift_ui64_inst = builder->AddBinaryOp(
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GetUint64Id(), SpvOpShiftRightLogical, ui64_inst->result_id(),
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builder->GetUintConstantId(32));
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Instruction* hi_ui64_inst = builder->AddUnaryOp(
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GetUintId(), SpvOpUConvert, rshift_ui64_inst->result_id());
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val_ids->push_back(lo_ui64_inst->result_id());
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val_ids->push_back(hi_ui64_inst->result_id());
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return;
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}
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case 8: {
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Instruction* ui8_inst = val_inst;
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if (i_ty->IsSigned()) {
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// Bitcast sint8 to uint8
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ui8_inst = builder->AddUnaryOp(GetUint8Id(), SpvOpBitcast,
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val_inst->result_id());
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}
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// Convert uint8 to uint32
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Instruction* ui32_inst = builder->AddUnaryOp(
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GetUintId(), SpvOpUConvert, ui8_inst->result_id());
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val_ids->push_back(ui32_inst->result_id());
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return;
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}
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case 32: {
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Instruction* ui32_inst = val_inst;
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if (i_ty->IsSigned()) {
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// Bitcast sint32 to uint32
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ui32_inst = builder->AddUnaryOp(GetUintId(), SpvOpBitcast,
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val_inst->result_id());
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}
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// uint32 needs no further processing
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val_ids->push_back(ui32_inst->result_id());
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return;
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}
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default:
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// TODO(greg-lunarg): Support non-32-bit int
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assert(false && "unsupported int width");
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return;
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}
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}
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default:
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assert(false && "unsupported type");
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return;
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}
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}
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void InstDebugPrintfPass::GenOutputCode(
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Instruction* printf_inst, uint32_t stage_idx,
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std::vector<std::unique_ptr<BasicBlock>>* new_blocks) {
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BasicBlock* back_blk_ptr = &*new_blocks->back();
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InstructionBuilder builder(
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context(), back_blk_ptr,
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IRContext::kAnalysisDefUse | IRContext::kAnalysisInstrToBlockMapping);
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// Gen debug printf record validation-specific values. The format string
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// will have its id written. Vectors will need to be broken down into
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// component values. float16 will need to be converted to float32. Pointer
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// and uint64 will need to be converted to two uint32 values. float32 will
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// need to be bitcast to uint32. int32 will need to be bitcast to uint32.
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std::vector<uint32_t> val_ids;
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bool is_first_operand = false;
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printf_inst->ForEachInId(
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[&is_first_operand, &val_ids, &builder, this](const uint32_t* iid) {
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// skip set operand
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if (!is_first_operand) {
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is_first_operand = true;
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return;
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}
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Instruction* opnd_inst = get_def_use_mgr()->GetDef(*iid);
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if (opnd_inst->opcode() == SpvOpString) {
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uint32_t string_id_id = builder.GetUintConstantId(*iid);
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val_ids.push_back(string_id_id);
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} else {
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GenOutputValues(opnd_inst, &val_ids, &builder);
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}
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});
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GenDebugStreamWrite(uid2offset_[printf_inst->unique_id()], stage_idx, val_ids,
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&builder);
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context()->KillInst(printf_inst);
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}
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void InstDebugPrintfPass::GenDebugPrintfCode(
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BasicBlock::iterator ref_inst_itr,
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UptrVectorIterator<BasicBlock> ref_block_itr, uint32_t stage_idx,
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std::vector<std::unique_ptr<BasicBlock>>* new_blocks) {
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// If not DebugPrintf OpExtInst, return.
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Instruction* printf_inst = &*ref_inst_itr;
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if (printf_inst->opcode() != SpvOpExtInst) return;
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if (printf_inst->GetSingleWordInOperand(0) != ext_inst_printf_id_) return;
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if (printf_inst->GetSingleWordInOperand(1) !=
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NonSemanticDebugPrintfDebugPrintf)
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return;
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// Initialize DefUse manager before dismantling module
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(void)get_def_use_mgr();
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// Move original block's preceding instructions into first new block
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std::unique_ptr<BasicBlock> new_blk_ptr;
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MovePreludeCode(ref_inst_itr, ref_block_itr, &new_blk_ptr);
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new_blocks->push_back(std::move(new_blk_ptr));
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// Generate instructions to output printf args to printf buffer
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GenOutputCode(printf_inst, stage_idx, new_blocks);
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// Caller expects at least two blocks with last block containing remaining
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// code, so end block after instrumentation, create remainder block, and
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// branch to it
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uint32_t rem_blk_id = TakeNextId();
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std::unique_ptr<Instruction> rem_label(NewLabel(rem_blk_id));
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BasicBlock* back_blk_ptr = &*new_blocks->back();
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InstructionBuilder builder(
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context(), back_blk_ptr,
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IRContext::kAnalysisDefUse | IRContext::kAnalysisInstrToBlockMapping);
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(void)builder.AddBranch(rem_blk_id);
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// Gen remainder block
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new_blk_ptr.reset(new BasicBlock(std::move(rem_label)));
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builder.SetInsertPoint(&*new_blk_ptr);
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// Move original block's remaining code into remainder block and add
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// to new blocks
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MovePostludeCode(ref_block_itr, &*new_blk_ptr);
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new_blocks->push_back(std::move(new_blk_ptr));
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}
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void InstDebugPrintfPass::InitializeInstDebugPrintf() {
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// Initialize base class
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InitializeInstrument();
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}
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Pass::Status InstDebugPrintfPass::ProcessImpl() {
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// Perform printf instrumentation on each entry point function in module
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InstProcessFunction pfn =
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[this](BasicBlock::iterator ref_inst_itr,
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UptrVectorIterator<BasicBlock> ref_block_itr, uint32_t stage_idx,
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std::vector<std::unique_ptr<BasicBlock>>* new_blocks) {
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return GenDebugPrintfCode(ref_inst_itr, ref_block_itr, stage_idx,
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new_blocks);
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};
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(void)InstProcessEntryPointCallTree(pfn);
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// Remove DebugPrintf OpExtInstImport instruction
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Instruction* ext_inst_import_inst =
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get_def_use_mgr()->GetDef(ext_inst_printf_id_);
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context()->KillInst(ext_inst_import_inst);
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// If no remaining non-semantic instruction sets, remove non-semantic debug
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// info extension from module and feature manager
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bool non_sem_set_seen = false;
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for (auto c_itr = context()->module()->ext_inst_import_begin();
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c_itr != context()->module()->ext_inst_import_end(); ++c_itr) {
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const char* set_name =
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reinterpret_cast<const char*>(&c_itr->GetInOperand(0).words[0]);
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const char* non_sem_str = "NonSemantic.";
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if (!strncmp(set_name, non_sem_str, strlen(non_sem_str))) {
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non_sem_set_seen = true;
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break;
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}
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}
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if (!non_sem_set_seen) {
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for (auto c_itr = context()->module()->extension_begin();
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c_itr != context()->module()->extension_end(); ++c_itr) {
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const char* ext_name =
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reinterpret_cast<const char*>(&c_itr->GetInOperand(0).words[0]);
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if (!strcmp(ext_name, "SPV_KHR_non_semantic_info")) {
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context()->KillInst(&*c_itr);
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break;
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}
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}
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context()->get_feature_mgr()->RemoveExtension(kSPV_KHR_non_semantic_info);
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}
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return Status::SuccessWithChange;
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}
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Pass::Status InstDebugPrintfPass::Process() {
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ext_inst_printf_id_ =
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get_module()->GetExtInstImportId("NonSemantic.DebugPrintf");
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if (ext_inst_printf_id_ == 0) return Status::SuccessWithoutChange;
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InitializeInstDebugPrintf();
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return ProcessImpl();
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}
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} // namespace opt
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} // namespace spvtools
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