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https://github.com/KhronosGroup/SPIRV-Tools
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537e77663d
We need to know how to generate correct SPIRV for cases like OpConstant %int64 42 since the current parser will encode the 42 as a 32-bit value incorrectly. This change is the first of a pair. This one tracks types, and makes sure that OpConstant and OpSpecConstant are only ever called with Integer or Float types, and OpSwitch is only called with integer generating values.
61 lines
2.5 KiB
C++
61 lines
2.5 KiB
C++
// Copyright (c) 2015 The Khronos Group Inc.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a
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// copy of this software and/or associated documentation files (the
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// "Materials"), to deal in the Materials without restriction, including
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// without limitation the rights to use, copy, modify, merge, publish,
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// distribute, sublicense, and/or sell copies of the Materials, and to
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// permit persons to whom the Materials are furnished to do so, subject to
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// the following conditions:
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//
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// The above copyright notice and this permission notice shall be included
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// in all copies or substantial portions of the Materials.
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//
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// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
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// KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
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// SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
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// https://www.khronos.org/registry/
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//
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// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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// MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
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#ifndef _LIBSPIRV_UTIL_INSTRUCTION_H_
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#define _LIBSPIRV_UTIL_INSTRUCTION_H_
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#include <cstdint>
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#include <vector>
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#include <headers/spirv.hpp>
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// Describes an instruction.
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struct spv_instruction_t {
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// Normally, both opcode and extInstType contain valid data.
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// However, when the assembler parses !<number> as the first word in
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// an instruction and opcode and extInstType are invalid.
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Op opcode;
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spv_ext_inst_type_t extInstType;
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// The Id of the result type, if this instruction has one. Zero otherwise.
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uint32_t resultTypeId;
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// The instruction, as a sequence of 32-bit words.
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// For a regular instruction the opcode and word count are combined
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// in words[0], as described in the SPIR-V spec.
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// Otherwise, the first token was !<number>, and that number appears
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// in words[0]. Subsequent elements are the result of parsing
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// tokens in the alternate parsing mode as described in syntax.md.
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std::vector<uint32_t> words;
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};
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// Appends a word to an instruction, without checking for overflow.
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inline void spvInstructionAddWord(spv_instruction_t* inst, uint32_t value) {
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inst->words.push_back(value);
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}
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#endif // _LIBSPIRV_UTIL_INSTRUCTION_H_
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