mirror of
https://github.com/KhronosGroup/SPIRV-Tools
synced 2024-11-30 15:00:06 +00:00
340370eddb
Remove extension whitelists from transforms that are essentially combinatorial (and avoiding pointers) or which affect only control flow. It's very very unlikely an extension will add a new control flow construct. Remove from: - dead branch elimination - dead insertion elimination - insert extract elimination - block merge Fixes https://github.com/KhronosGroup/SPIRV-Tools/issues/1392
395 lines
15 KiB
C++
395 lines
15 KiB
C++
// Copyright (c) 2017 The Khronos Group Inc.
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// Copyright (c) 2017 Valve Corporation
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// Copyright (c) 2017 LunarG Inc.
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// Copyright (c) 2018 Google Inc.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "dead_branch_elim_pass.h"
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#include "cfa.h"
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#include "ir_context.h"
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#include "iterator.h"
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#include "make_unique.h"
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namespace spvtools {
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namespace opt {
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namespace {
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const uint32_t kBranchCondTrueLabIdInIdx = 1;
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const uint32_t kBranchCondFalseLabIdInIdx = 2;
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} // anonymous namespace
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bool DeadBranchElimPass::GetConstCondition(uint32_t condId, bool* condVal) {
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bool condIsConst;
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ir::Instruction* cInst = get_def_use_mgr()->GetDef(condId);
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switch (cInst->opcode()) {
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case SpvOpConstantFalse: {
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*condVal = false;
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condIsConst = true;
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} break;
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case SpvOpConstantTrue: {
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*condVal = true;
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condIsConst = true;
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} break;
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case SpvOpLogicalNot: {
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bool negVal;
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condIsConst =
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GetConstCondition(cInst->GetSingleWordInOperand(0), &negVal);
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if (condIsConst) *condVal = !negVal;
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} break;
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default: { condIsConst = false; } break;
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}
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return condIsConst;
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}
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bool DeadBranchElimPass::GetConstInteger(uint32_t selId, uint32_t* selVal) {
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ir::Instruction* sInst = get_def_use_mgr()->GetDef(selId);
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uint32_t typeId = sInst->type_id();
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ir::Instruction* typeInst = get_def_use_mgr()->GetDef(typeId);
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if (!typeInst || (typeInst->opcode() != SpvOpTypeInt)) return false;
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// TODO(greg-lunarg): Support non-32 bit ints
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if (typeInst->GetSingleWordInOperand(0) != 32) return false;
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if (sInst->opcode() == SpvOpConstant) {
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*selVal = sInst->GetSingleWordInOperand(0);
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return true;
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} else if (sInst->opcode() == SpvOpConstantNull) {
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*selVal = 0;
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return true;
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}
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return false;
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}
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void DeadBranchElimPass::AddBranch(uint32_t labelId, ir::BasicBlock* bp) {
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assert(get_def_use_mgr()->GetDef(labelId) != nullptr);
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std::unique_ptr<ir::Instruction> newBranch(new ir::Instruction(
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context(), SpvOpBranch, 0, 0,
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{{spv_operand_type_t::SPV_OPERAND_TYPE_ID, {labelId}}}));
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get_def_use_mgr()->AnalyzeInstDefUse(&*newBranch);
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bp->AddInstruction(std::move(newBranch));
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}
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ir::BasicBlock* DeadBranchElimPass::GetParentBlock(uint32_t id) {
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return context()->get_instr_block(get_def_use_mgr()->GetDef(id));
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}
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bool DeadBranchElimPass::MarkLiveBlocks(
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ir::Function* func, std::unordered_set<ir::BasicBlock*>* live_blocks) {
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std::unordered_set<ir::BasicBlock*> continues;
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std::vector<ir::BasicBlock*> stack;
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stack.push_back(&*func->begin());
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bool modified = false;
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while (!stack.empty()) {
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ir::BasicBlock* block = stack.back();
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stack.pop_back();
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// Live blocks doubles as visited set.
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if (!live_blocks->insert(block).second) continue;
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uint32_t cont_id = block->ContinueBlockIdIfAny();
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if (cont_id != 0) continues.insert(GetParentBlock(cont_id));
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ir::Instruction* terminator = block->terminator();
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uint32_t live_lab_id = 0;
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// Check if the terminator has a single valid successor.
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if (terminator->opcode() == SpvOpBranchConditional) {
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bool condVal;
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if (GetConstCondition(terminator->GetSingleWordInOperand(0u), &condVal)) {
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live_lab_id = terminator->GetSingleWordInOperand(
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condVal ? kBranchCondTrueLabIdInIdx : kBranchCondFalseLabIdInIdx);
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}
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} else if (terminator->opcode() == SpvOpSwitch) {
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uint32_t sel_val;
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if (GetConstInteger(terminator->GetSingleWordInOperand(0u), &sel_val)) {
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// Search switch operands for selector value, set live_lab_id to
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// corresponding label, use default if not found.
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uint32_t icnt = 0;
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uint32_t case_val;
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terminator->WhileEachInOperand(
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[&icnt, &case_val, &sel_val, &live_lab_id](const uint32_t* idp) {
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if (icnt == 1) {
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// Start with default label.
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live_lab_id = *idp;
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} else if (icnt > 1) {
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if (icnt % 2 == 0) {
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case_val = *idp;
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} else {
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if (case_val == sel_val) {
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live_lab_id = *idp;
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return false;
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}
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}
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}
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++icnt;
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return true;
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});
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}
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}
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// Don't simplify branches of continue blocks. A path from the continue to
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// the header is required.
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// TODO(alan-baker): They can be simplified iff there remains a path to the
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// backedge. Structured control flow should guarantee one path hits the
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// backedge, but I've removed the requirement for structured control flow
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// from this pass.
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bool simplify = live_lab_id != 0 && !continues.count(block);
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if (simplify) {
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modified = true;
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// Replace with unconditional branch.
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// Remove the merge instruction if it is a selection merge.
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AddBranch(live_lab_id, block);
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context()->KillInst(terminator);
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ir::Instruction* mergeInst = block->GetMergeInst();
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if (mergeInst && mergeInst->opcode() == SpvOpSelectionMerge) {
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context()->KillInst(mergeInst);
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}
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stack.push_back(GetParentBlock(live_lab_id));
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} else {
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// All successors are live.
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const auto* const_block = block;
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const_block->ForEachSuccessorLabel([&stack, this](const uint32_t label) {
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stack.push_back(GetParentBlock(label));
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});
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}
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}
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return modified;
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}
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void DeadBranchElimPass::MarkUnreachableStructuredTargets(
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const std::unordered_set<ir::BasicBlock*>& live_blocks,
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std::unordered_set<ir::BasicBlock*>* unreachable_merges,
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std::unordered_map<ir::BasicBlock*, ir::BasicBlock*>*
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unreachable_continues) {
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for (auto block : live_blocks) {
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if (auto merge_id = block->MergeBlockIdIfAny()) {
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ir::BasicBlock* merge_block = GetParentBlock(merge_id);
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if (!live_blocks.count(merge_block)) {
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unreachable_merges->insert(merge_block);
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}
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if (auto cont_id = block->ContinueBlockIdIfAny()) {
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ir::BasicBlock* cont_block = GetParentBlock(cont_id);
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if (!live_blocks.count(cont_block)) {
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(*unreachable_continues)[cont_block] = block;
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}
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}
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}
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}
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}
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bool DeadBranchElimPass::FixPhiNodesInLiveBlocks(
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ir::Function* func, const std::unordered_set<ir::BasicBlock*>& live_blocks,
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const std::unordered_map<ir::BasicBlock*, ir::BasicBlock*>&
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unreachable_continues) {
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bool modified = false;
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for (auto& block : *func) {
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if (live_blocks.count(&block)) {
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for (auto iter = block.begin(); iter != block.end();) {
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if (iter->opcode() != SpvOpPhi) {
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break;
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}
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bool changed = false;
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bool backedge_added = false;
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ir::Instruction* inst = &*iter;
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std::vector<ir::Operand> operands;
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// Build a complete set of operands (not just input operands). Start
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// with type and result id operands.
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operands.push_back(inst->GetOperand(0u));
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operands.push_back(inst->GetOperand(1u));
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// Iterate through the incoming labels and determine which to keep
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// and/or modify. If there in an unreachable continue block, there will
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// be an edge from that block to the header. We need to keep it to
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// maintain the structured control flow. If the header has more that 2
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// incoming edges, then the OpPhi must have an entry for that edge.
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// However, if there is only one other incoming edge, the OpPhi can be
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// eliminated.
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for (uint32_t i = 1; i < inst->NumInOperands(); i += 2) {
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ir::BasicBlock* inc = GetParentBlock(inst->GetSingleWordInOperand(i));
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auto cont_iter = unreachable_continues.find(inc);
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if (cont_iter != unreachable_continues.end() &&
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cont_iter->second == &block && inst->NumInOperands() > 4) {
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if (get_def_use_mgr()
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->GetDef(inst->GetSingleWordInOperand(i - 1))
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->opcode() == SpvOpUndef) {
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// Already undef incoming value, no change necessary.
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operands.push_back(inst->GetInOperand(i - 1));
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operands.push_back(inst->GetInOperand(i));
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backedge_added = true;
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} else {
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// Replace incoming value with undef if this phi exists in the
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// loop header. Otherwise, this edge is not live since the
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// unreachable continue block will be replaced with an
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// unconditional branch to the header only.
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operands.emplace_back(
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SPV_OPERAND_TYPE_ID,
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std::initializer_list<uint32_t>{Type2Undef(inst->type_id())});
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operands.push_back(inst->GetInOperand(i));
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changed = true;
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backedge_added = true;
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}
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} else if (live_blocks.count(inc) && inc->IsSuccessor(&block)) {
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// Keep live incoming edge.
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operands.push_back(inst->GetInOperand(i - 1));
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operands.push_back(inst->GetInOperand(i));
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} else {
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// Remove incoming edge.
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changed = true;
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}
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}
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if (changed) {
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modified = true;
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uint32_t continue_id = block.ContinueBlockIdIfAny();
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if (!backedge_added && continue_id != 0 &&
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unreachable_continues.count(GetParentBlock(continue_id)) &&
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operands.size() > 4) {
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// Changed the backedge to branch from the continue block instead
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// of a successor of the continue block. Add an entry to the phi to
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// provide an undef for the continue block. Since the successor of
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// the continue must also be unreachable (dominated by the continue
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// block), any entry for the original backedge has been removed
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// from the phi operands.
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operands.emplace_back(
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SPV_OPERAND_TYPE_ID,
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std::initializer_list<uint32_t>{Type2Undef(inst->type_id())});
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operands.emplace_back(SPV_OPERAND_TYPE_ID,
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std::initializer_list<uint32_t>{continue_id});
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}
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// Either replace the phi with a single value or rebuild the phi out
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// of |operands|.
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//
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// We always have type and result id operands. So this phi has a
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// single source if there are two more operands beyond those.
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if (operands.size() == 4) {
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// First input data operands is at index 2.
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uint32_t replId = operands[2u].words[0];
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context()->ReplaceAllUsesWith(inst->result_id(), replId);
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iter = context()->KillInst(&*inst);
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} else {
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// We've rewritten the operands, so first instruct the def/use
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// manager to forget uses in the phi before we replace them. After
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// replacing operands update the def/use manager by re-analyzing
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// the used ids in this phi.
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get_def_use_mgr()->EraseUseRecordsOfOperandIds(inst);
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inst->ReplaceOperands(operands);
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get_def_use_mgr()->AnalyzeInstUse(inst);
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++iter;
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}
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} else {
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++iter;
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}
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}
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}
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}
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return modified;
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}
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bool DeadBranchElimPass::EraseDeadBlocks(
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ir::Function* func, const std::unordered_set<ir::BasicBlock*>& live_blocks,
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const std::unordered_set<ir::BasicBlock*>& unreachable_merges,
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const std::unordered_map<ir::BasicBlock*, ir::BasicBlock*>&
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unreachable_continues) {
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bool modified = false;
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for (auto ebi = func->begin(); ebi != func->end();) {
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if (unreachable_merges.count(&*ebi)) {
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if (ebi->begin() != ebi->tail() ||
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ebi->terminator()->opcode() != SpvOpUnreachable) {
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// Make unreachable, but leave the label.
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KillAllInsts(&*ebi, false);
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// Add unreachable terminator.
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ebi->AddInstruction(
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MakeUnique<ir::Instruction>(context(), SpvOpUnreachable, 0, 0,
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std::initializer_list<ir::Operand>{}));
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modified = true;
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}
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++ebi;
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} else if (unreachable_continues.count(&*ebi)) {
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uint32_t cont_id = unreachable_continues.find(&*ebi)->second->id();
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if (ebi->begin() != ebi->tail() ||
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ebi->terminator()->opcode() != SpvOpBranch ||
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ebi->terminator()->GetSingleWordInOperand(0u) != cont_id) {
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// Make unreachable, but leave the label.
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KillAllInsts(&*ebi, false);
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// Add unconditional branch to header.
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assert(unreachable_continues.count(&*ebi));
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ebi->AddInstruction(
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MakeUnique<ir::Instruction>(context(), SpvOpBranch, 0, 0,
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std::initializer_list<ir::Operand>{
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{SPV_OPERAND_TYPE_ID, {cont_id}}}));
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get_def_use_mgr()->AnalyzeInstUse(&*ebi->tail());
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modified = true;
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}
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++ebi;
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} else if (!live_blocks.count(&*ebi)) {
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// Kill this block.
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KillAllInsts(&*ebi);
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ebi = ebi.Erase();
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modified = true;
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} else {
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++ebi;
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}
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}
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return modified;
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}
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bool DeadBranchElimPass::EliminateDeadBranches(ir::Function* func) {
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bool modified = false;
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std::unordered_set<ir::BasicBlock*> live_blocks;
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modified |= MarkLiveBlocks(func, &live_blocks);
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std::unordered_set<ir::BasicBlock*> unreachable_merges;
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std::unordered_map<ir::BasicBlock*, ir::BasicBlock*> unreachable_continues;
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MarkUnreachableStructuredTargets(live_blocks, &unreachable_merges,
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&unreachable_continues);
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modified |= FixPhiNodesInLiveBlocks(func, live_blocks, unreachable_continues);
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modified |= EraseDeadBlocks(func, live_blocks, unreachable_merges,
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unreachable_continues);
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return modified;
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}
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void DeadBranchElimPass::Initialize(ir::IRContext* c) {
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InitializeProcessing(c);
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};
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Pass::Status DeadBranchElimPass::ProcessImpl() {
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// Do not process if module contains OpGroupDecorate. Additional
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// support required in KillNamesAndDecorates().
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// TODO(greg-lunarg): Add support for OpGroupDecorate
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for (auto& ai : get_module()->annotations())
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if (ai.opcode() == SpvOpGroupDecorate) return Status::SuccessWithoutChange;
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// Process all entry point functions
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ProcessFunction pfn = [this](ir::Function* fp) {
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return EliminateDeadBranches(fp);
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};
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bool modified = ProcessReachableCallTree(pfn, context());
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return modified ? Status::SuccessWithChange : Status::SuccessWithoutChange;
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}
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DeadBranchElimPass::DeadBranchElimPass() {}
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Pass::Status DeadBranchElimPass::Process(ir::IRContext* module) {
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Initialize(module);
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return ProcessImpl();
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}
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} // namespace opt
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} // namespace spvtools
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