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https://github.com/KhronosGroup/SPIRV-Tools
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d11725b1d4
The first pass applies the RelaxedPrecision decoration to all executable instructions with float32 based type results. The second pass converts all executable instructions with RelaxedPrecision result to the equivalent float16 type, inserting converts where necessary.
461 lines
18 KiB
C++
461 lines
18 KiB
C++
// Copyright (c) 2019 The Khronos Group Inc.
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// Copyright (c) 2019 Valve Corporation
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// Copyright (c) 2019 LunarG Inc.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "convert_to_half_pass.h"
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#include "source/opt/ir_builder.h"
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namespace {
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// Indices of operands in SPIR-V instructions
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static const int kImageSampleDrefIdInIdx = 2;
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} // anonymous namespace
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namespace spvtools {
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namespace opt {
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bool ConvertToHalfPass::IsArithmetic(Instruction* inst) {
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return target_ops_core_.count(inst->opcode()) != 0 ||
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(inst->opcode() == SpvOpExtInst &&
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inst->GetSingleWordInOperand(0) ==
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context()->get_feature_mgr()->GetExtInstImportId_GLSLstd450() &&
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target_ops_450_.count(inst->GetSingleWordInOperand(1)) != 0);
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}
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bool ConvertToHalfPass::IsFloat(Instruction* inst, uint32_t width) {
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uint32_t ty_id = inst->type_id();
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if (ty_id == 0) return false;
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return Pass::IsFloat(ty_id, width);
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}
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bool ConvertToHalfPass::IsRelaxed(Instruction* inst) {
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uint32_t r_id = inst->result_id();
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for (auto r_inst : get_decoration_mgr()->GetDecorationsFor(r_id, false))
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if (r_inst->opcode() == SpvOpDecorate &&
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r_inst->GetSingleWordInOperand(1) == SpvDecorationRelaxedPrecision)
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return true;
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return false;
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}
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analysis::Type* ConvertToHalfPass::FloatScalarType(uint32_t width) {
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analysis::Float float_ty(width);
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return context()->get_type_mgr()->GetRegisteredType(&float_ty);
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}
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analysis::Type* ConvertToHalfPass::FloatVectorType(uint32_t v_len,
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uint32_t width) {
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analysis::Type* reg_float_ty = FloatScalarType(width);
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analysis::Vector vec_ty(reg_float_ty, v_len);
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return context()->get_type_mgr()->GetRegisteredType(&vec_ty);
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}
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analysis::Type* ConvertToHalfPass::FloatMatrixType(uint32_t v_cnt,
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uint32_t vty_id,
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uint32_t width) {
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Instruction* vty_inst = get_def_use_mgr()->GetDef(vty_id);
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uint32_t v_len = vty_inst->GetSingleWordInOperand(1);
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analysis::Type* reg_vec_ty = FloatVectorType(v_len, width);
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analysis::Matrix mat_ty(reg_vec_ty, v_cnt);
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return context()->get_type_mgr()->GetRegisteredType(&mat_ty);
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}
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uint32_t ConvertToHalfPass::EquivFloatTypeId(uint32_t ty_id, uint32_t width) {
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analysis::Type* reg_equiv_ty;
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Instruction* ty_inst = get_def_use_mgr()->GetDef(ty_id);
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if (ty_inst->opcode() == SpvOpTypeMatrix)
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reg_equiv_ty = FloatMatrixType(ty_inst->GetSingleWordInOperand(1),
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ty_inst->GetSingleWordInOperand(0), width);
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else if (ty_inst->opcode() == SpvOpTypeVector)
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reg_equiv_ty = FloatVectorType(ty_inst->GetSingleWordInOperand(1), width);
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else // SpvOpTypeFloat
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reg_equiv_ty = FloatScalarType(width);
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return context()->get_type_mgr()->GetTypeInstruction(reg_equiv_ty);
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}
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void ConvertToHalfPass::GenConvert(uint32_t* val_idp, uint32_t width,
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InstructionBuilder* builder) {
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Instruction* val_inst = get_def_use_mgr()->GetDef(*val_idp);
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uint32_t ty_id = val_inst->type_id();
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uint32_t nty_id = EquivFloatTypeId(ty_id, width);
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if (nty_id == ty_id) return;
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Instruction* cvt_inst;
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if (val_inst->opcode() == SpvOpUndef)
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cvt_inst = builder->AddNullaryOp(nty_id, SpvOpUndef);
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else
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cvt_inst = builder->AddUnaryOp(nty_id, SpvOpFConvert, *val_idp);
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*val_idp = cvt_inst->result_id();
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}
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bool ConvertToHalfPass::MatConvertCleanup(Instruction* inst) {
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if (inst->opcode() != SpvOpFConvert) return false;
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uint32_t mty_id = inst->type_id();
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Instruction* mty_inst = get_def_use_mgr()->GetDef(mty_id);
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if (mty_inst->opcode() != SpvOpTypeMatrix) return false;
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uint32_t vty_id = mty_inst->GetSingleWordInOperand(0);
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uint32_t v_cnt = mty_inst->GetSingleWordInOperand(1);
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Instruction* vty_inst = get_def_use_mgr()->GetDef(vty_id);
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uint32_t cty_id = vty_inst->GetSingleWordInOperand(0);
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Instruction* cty_inst = get_def_use_mgr()->GetDef(cty_id);
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InstructionBuilder builder(
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context(), inst,
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IRContext::kAnalysisDefUse | IRContext::kAnalysisInstrToBlockMapping);
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// Convert each component vector, combine them with OpCompositeConstruct
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// and replace original instruction.
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uint32_t orig_width = (cty_inst->GetSingleWordInOperand(0) == 16) ? 32 : 16;
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uint32_t orig_mat_id = inst->GetSingleWordInOperand(0);
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uint32_t orig_vty_id = EquivFloatTypeId(vty_id, orig_width);
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std::vector<Operand> opnds = {};
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for (uint32_t vidx = 0; vidx < v_cnt; ++vidx) {
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Instruction* ext_inst = builder.AddIdLiteralOp(
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orig_vty_id, SpvOpCompositeExtract, orig_mat_id, vidx);
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Instruction* cvt_inst =
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builder.AddUnaryOp(vty_id, SpvOpFConvert, ext_inst->result_id());
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opnds.push_back({SPV_OPERAND_TYPE_ID, {cvt_inst->result_id()}});
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}
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uint32_t mat_id = TakeNextId();
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std::unique_ptr<Instruction> mat_inst(new Instruction(
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context(), SpvOpCompositeConstruct, mty_id, mat_id, opnds));
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(void)builder.AddInstruction(std::move(mat_inst));
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context()->ReplaceAllUsesWith(inst->result_id(), mat_id);
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// Turn original instruction into copy so it is valid.
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inst->SetOpcode(SpvOpCopyObject);
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inst->SetResultType(EquivFloatTypeId(mty_id, orig_width));
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get_def_use_mgr()->AnalyzeInstUse(inst);
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return true;
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}
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void ConvertToHalfPass::RemoveRelaxedDecoration(uint32_t id) {
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context()->get_decoration_mgr()->RemoveDecorationsFrom(
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id, [](const Instruction& dec) {
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if (dec.opcode() == SpvOpDecorate &&
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dec.GetSingleWordInOperand(1u) == SpvDecorationRelaxedPrecision)
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return true;
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else
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return false;
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});
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}
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bool ConvertToHalfPass::GenHalfArith(Instruction* inst) {
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bool modified = false;
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// Convert all float32 based operands to float16 equivalent and change
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// instruction type to float16 equivalent.
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InstructionBuilder builder(
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context(), inst,
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IRContext::kAnalysisDefUse | IRContext::kAnalysisInstrToBlockMapping);
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inst->ForEachInId([&builder, &modified, this](uint32_t* idp) {
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Instruction* op_inst = get_def_use_mgr()->GetDef(*idp);
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if (!IsFloat(op_inst, 32)) return;
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GenConvert(idp, 16, &builder);
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modified = true;
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});
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if (IsFloat(inst, 32)) {
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inst->SetResultType(EquivFloatTypeId(inst->type_id(), 16));
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modified = true;
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}
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if (modified) get_def_use_mgr()->AnalyzeInstUse(inst);
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return modified;
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}
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bool ConvertToHalfPass::ProcessPhi(Instruction* inst) {
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// Skip if not float32
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if (!IsFloat(inst, 32)) return false;
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// Skip if no relaxed operands.
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bool relaxed_found = false;
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uint32_t ocnt = 0;
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inst->ForEachInId([&ocnt, &relaxed_found, this](uint32_t* idp) {
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if (ocnt % 2 == 0) {
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Instruction* val_inst = get_def_use_mgr()->GetDef(*idp);
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if (IsRelaxed(val_inst)) relaxed_found = true;
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}
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++ocnt;
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});
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if (!relaxed_found) return false;
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// Add float16 converts of any float32 operands and change type
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// of phi to float16 equivalent. Operand converts need to be added to
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// preceeding blocks.
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ocnt = 0;
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uint32_t* prev_idp;
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inst->ForEachInId([&ocnt, &prev_idp, this](uint32_t* idp) {
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if (ocnt % 2 == 0) {
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prev_idp = idp;
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} else {
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Instruction* val_inst = get_def_use_mgr()->GetDef(*prev_idp);
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if (IsFloat(val_inst, 32)) {
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BasicBlock* bp = context()->get_instr_block(*idp);
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auto insert_before = bp->tail();
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if (insert_before != bp->begin()) {
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--insert_before;
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if (insert_before->opcode() != SpvOpSelectionMerge &&
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insert_before->opcode() != SpvOpLoopMerge)
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++insert_before;
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}
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InstructionBuilder builder(context(), &*insert_before,
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IRContext::kAnalysisDefUse |
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IRContext::kAnalysisInstrToBlockMapping);
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GenConvert(prev_idp, 16, &builder);
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}
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}
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++ocnt;
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});
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inst->SetResultType(EquivFloatTypeId(inst->type_id(), 16));
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get_def_use_mgr()->AnalyzeInstUse(inst);
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return true;
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}
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bool ConvertToHalfPass::ProcessExtract(Instruction* inst) {
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bool modified = false;
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uint32_t comp_id = inst->GetSingleWordInOperand(0);
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Instruction* comp_inst = get_def_use_mgr()->GetDef(comp_id);
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// If extract is relaxed float32 based type and the composite is a relaxed
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// float32 based type, convert it to float16 equivalent. This is slightly
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// aggressive and pushes any likely conversion to apply to the whole
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// composite rather than apply to each extracted component later. This
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// can be a win if the platform can convert the entire composite in the same
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// time as one component. It risks converting components that may not be
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// used, although empirical data on a large set of real-world shaders seems
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// to suggest this is not common and the composite convert is the best choice.
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if (IsFloat(inst, 32) && IsRelaxed(inst) && IsFloat(comp_inst, 32) &&
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IsRelaxed(comp_inst)) {
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InstructionBuilder builder(
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context(), inst,
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IRContext::kAnalysisDefUse | IRContext::kAnalysisInstrToBlockMapping);
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GenConvert(&comp_id, 16, &builder);
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inst->SetInOperand(0, {comp_id});
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comp_inst = get_def_use_mgr()->GetDef(comp_id);
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modified = true;
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}
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// If the composite is a float16 based type, make sure the type of the
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// extract agrees.
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if (IsFloat(comp_inst, 16) && !IsFloat(inst, 16)) {
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inst->SetResultType(EquivFloatTypeId(inst->type_id(), 16));
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modified = true;
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}
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if (modified) get_def_use_mgr()->AnalyzeInstUse(inst);
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return modified;
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}
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bool ConvertToHalfPass::ProcessConvert(Instruction* inst) {
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// If float32 and relaxed, change to float16 convert
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if (IsFloat(inst, 32) && IsRelaxed(inst)) {
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inst->SetResultType(EquivFloatTypeId(inst->type_id(), 16));
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get_def_use_mgr()->AnalyzeInstUse(inst);
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}
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// If operand and result types are the same, replace result with operand
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// and change convert to copy to keep validator happy; DCE will clean it up
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uint32_t val_id = inst->GetSingleWordInOperand(0);
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Instruction* val_inst = get_def_use_mgr()->GetDef(val_id);
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if (inst->type_id() == val_inst->type_id()) {
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context()->ReplaceAllUsesWith(inst->result_id(), val_id);
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inst->SetOpcode(SpvOpCopyObject);
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}
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return true; // modified
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}
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bool ConvertToHalfPass::ProcessImageRef(Instruction* inst) {
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bool modified = false;
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// If image reference, only need to convert dref args back to float32
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if (dref_image_ops_.count(inst->opcode()) != 0) {
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uint32_t dref_id = inst->GetSingleWordInOperand(kImageSampleDrefIdInIdx);
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Instruction* dref_inst = get_def_use_mgr()->GetDef(dref_id);
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if (IsFloat(dref_inst, 16) && IsRelaxed(dref_inst)) {
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InstructionBuilder builder(
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context(), inst,
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IRContext::kAnalysisDefUse | IRContext::kAnalysisInstrToBlockMapping);
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GenConvert(&dref_id, 32, &builder);
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inst->SetInOperand(kImageSampleDrefIdInIdx, {dref_id});
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get_def_use_mgr()->AnalyzeInstUse(inst);
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modified = true;
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}
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}
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return modified;
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}
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bool ConvertToHalfPass::ProcessDefault(Instruction* inst) {
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bool modified = false;
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// If non-relaxed instruction has changed operands, need to convert
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// them back to float32
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InstructionBuilder builder(
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context(), inst,
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IRContext::kAnalysisDefUse | IRContext::kAnalysisInstrToBlockMapping);
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inst->ForEachInId([&builder, &modified, this](uint32_t* idp) {
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Instruction* op_inst = get_def_use_mgr()->GetDef(*idp);
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if (!IsFloat(op_inst, 16)) return;
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if (!IsRelaxed(op_inst)) return;
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uint32_t old_id = *idp;
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GenConvert(idp, 32, &builder);
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if (*idp != old_id) modified = true;
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});
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if (modified) get_def_use_mgr()->AnalyzeInstUse(inst);
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return modified;
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}
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bool ConvertToHalfPass::GenHalfCode(Instruction* inst) {
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bool modified = false;
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// Remember id for later deletion of RelaxedPrecision decoration
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bool inst_relaxed = IsRelaxed(inst);
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if (inst_relaxed) relaxed_ids_.push_back(inst->result_id());
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if (IsArithmetic(inst) && inst_relaxed)
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modified = GenHalfArith(inst);
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else if (inst->opcode() == SpvOpPhi)
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modified = ProcessPhi(inst);
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else if (inst->opcode() == SpvOpCompositeExtract)
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modified = ProcessExtract(inst);
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else if (inst->opcode() == SpvOpFConvert)
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modified = ProcessConvert(inst);
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else if (image_ops_.count(inst->opcode()) != 0)
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modified = ProcessImageRef(inst);
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else
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modified = ProcessDefault(inst);
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return modified;
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}
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bool ConvertToHalfPass::ProcessFunction(Function* func) {
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bool modified = false;
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cfg()->ForEachBlockInReversePostOrder(
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func->entry().get(), [&modified, this](BasicBlock* bb) {
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for (auto ii = bb->begin(); ii != bb->end(); ++ii)
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modified |= GenHalfCode(&*ii);
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});
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cfg()->ForEachBlockInReversePostOrder(
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func->entry().get(), [&modified, this](BasicBlock* bb) {
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for (auto ii = bb->begin(); ii != bb->end(); ++ii)
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modified |= MatConvertCleanup(&*ii);
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});
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return modified;
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}
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Pass::Status ConvertToHalfPass::ProcessImpl() {
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Pass::ProcessFunction pfn = [this](Function* fp) {
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return ProcessFunction(fp);
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};
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bool modified = context()->ProcessEntryPointCallTree(pfn);
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// If modified, make sure module has Float16 capability
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if (modified) context()->AddCapability(SpvCapabilityFloat16);
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// Remove all RelaxedPrecision decorations from instructions and globals
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for (auto c_id : relaxed_ids_) RemoveRelaxedDecoration(c_id);
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for (auto& val : get_module()->types_values()) {
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uint32_t v_id = val.result_id();
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if (v_id != 0) RemoveRelaxedDecoration(v_id);
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}
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return modified ? Status::SuccessWithChange : Status::SuccessWithoutChange;
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}
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Pass::Status ConvertToHalfPass::Process() {
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Initialize();
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return ProcessImpl();
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}
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void ConvertToHalfPass::Initialize() {
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target_ops_core_ = {
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SpvOpVectorExtractDynamic,
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SpvOpVectorInsertDynamic,
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SpvOpVectorShuffle,
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SpvOpCompositeConstruct,
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SpvOpCompositeInsert,
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SpvOpCopyObject,
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SpvOpTranspose,
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SpvOpConvertSToF,
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SpvOpConvertUToF,
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// SpvOpFConvert,
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// SpvOpQuantizeToF16,
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SpvOpFNegate,
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SpvOpFAdd,
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SpvOpFSub,
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SpvOpFMul,
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SpvOpFDiv,
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SpvOpFMod,
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SpvOpVectorTimesScalar,
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SpvOpMatrixTimesScalar,
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SpvOpVectorTimesMatrix,
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SpvOpMatrixTimesVector,
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SpvOpMatrixTimesMatrix,
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SpvOpOuterProduct,
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SpvOpDot,
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SpvOpSelect,
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SpvOpFOrdEqual,
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SpvOpFUnordEqual,
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SpvOpFOrdNotEqual,
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SpvOpFUnordNotEqual,
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SpvOpFOrdLessThan,
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SpvOpFUnordLessThan,
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SpvOpFOrdGreaterThan,
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SpvOpFUnordGreaterThan,
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SpvOpFOrdLessThanEqual,
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SpvOpFUnordLessThanEqual,
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SpvOpFOrdGreaterThanEqual,
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SpvOpFUnordGreaterThanEqual,
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};
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target_ops_450_ = {
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GLSLstd450Round, GLSLstd450RoundEven, GLSLstd450Trunc, GLSLstd450FAbs,
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GLSLstd450FSign, GLSLstd450Floor, GLSLstd450Ceil, GLSLstd450Fract,
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GLSLstd450Radians, GLSLstd450Degrees, GLSLstd450Sin, GLSLstd450Cos,
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GLSLstd450Tan, GLSLstd450Asin, GLSLstd450Acos, GLSLstd450Atan,
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GLSLstd450Sinh, GLSLstd450Cosh, GLSLstd450Tanh, GLSLstd450Asinh,
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GLSLstd450Acosh, GLSLstd450Atanh, GLSLstd450Atan2, GLSLstd450Pow,
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GLSLstd450Exp, GLSLstd450Log, GLSLstd450Exp2, GLSLstd450Log2,
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GLSLstd450Sqrt, GLSLstd450InverseSqrt, GLSLstd450Determinant,
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GLSLstd450MatrixInverse,
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// TODO(greg-lunarg): GLSLstd450ModfStruct,
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GLSLstd450FMin, GLSLstd450FMax, GLSLstd450FClamp, GLSLstd450FMix,
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GLSLstd450Step, GLSLstd450SmoothStep, GLSLstd450Fma,
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// TODO(greg-lunarg): GLSLstd450FrexpStruct,
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GLSLstd450Ldexp, GLSLstd450Length, GLSLstd450Distance, GLSLstd450Cross,
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GLSLstd450Normalize, GLSLstd450FaceForward, GLSLstd450Reflect,
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GLSLstd450Refract, GLSLstd450NMin, GLSLstd450NMax, GLSLstd450NClamp};
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image_ops_ = {SpvOpImageSampleImplicitLod,
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SpvOpImageSampleExplicitLod,
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SpvOpImageSampleDrefImplicitLod,
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SpvOpImageSampleDrefExplicitLod,
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SpvOpImageSampleProjImplicitLod,
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SpvOpImageSampleProjExplicitLod,
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SpvOpImageSampleProjDrefImplicitLod,
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SpvOpImageSampleProjDrefExplicitLod,
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SpvOpImageFetch,
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SpvOpImageGather,
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SpvOpImageDrefGather,
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SpvOpImageRead,
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SpvOpImageSparseSampleImplicitLod,
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SpvOpImageSparseSampleExplicitLod,
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SpvOpImageSparseSampleDrefImplicitLod,
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SpvOpImageSparseSampleDrefExplicitLod,
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SpvOpImageSparseSampleProjImplicitLod,
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SpvOpImageSparseSampleProjExplicitLod,
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SpvOpImageSparseSampleProjDrefImplicitLod,
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SpvOpImageSparseSampleProjDrefExplicitLod,
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|
SpvOpImageSparseFetch,
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SpvOpImageSparseGather,
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SpvOpImageSparseDrefGather,
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SpvOpImageSparseTexelsResident,
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SpvOpImageSparseRead};
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dref_image_ops_ = {
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SpvOpImageSampleDrefImplicitLod,
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SpvOpImageSampleDrefExplicitLod,
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SpvOpImageSampleProjDrefImplicitLod,
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|
SpvOpImageSampleProjDrefExplicitLod,
|
|
SpvOpImageDrefGather,
|
|
SpvOpImageSparseSampleDrefImplicitLod,
|
|
SpvOpImageSparseSampleDrefExplicitLod,
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|
SpvOpImageSparseSampleProjDrefImplicitLod,
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SpvOpImageSparseSampleProjDrefExplicitLod,
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SpvOpImageSparseDrefGather,
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};
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relaxed_ids_.clear();
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}
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} // namespace opt
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} // namespace spvtools
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