mirror of
https://github.com/KhronosGroup/SPIRV-Tools
synced 2024-11-22 19:50:05 +00:00
518 lines
20 KiB
C++
518 lines
20 KiB
C++
// Copyright (c) 2019 The Khronos Group Inc.
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// Copyright (c) 2019 Valve Corporation
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// Copyright (c) 2019 LunarG Inc.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "convert_to_half_pass.h"
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#include "source/opt/ir_builder.h"
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namespace spvtools {
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namespace opt {
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namespace {
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// Indices of operands in SPIR-V instructions
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constexpr int kImageSampleDrefIdInIdx = 2;
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} // namespace
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bool ConvertToHalfPass::IsArithmetic(Instruction* inst) {
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return target_ops_core_.count(inst->opcode()) != 0 ||
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(inst->opcode() == spv::Op::OpExtInst &&
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inst->GetSingleWordInOperand(0) ==
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context()->get_feature_mgr()->GetExtInstImportId_GLSLstd450() &&
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target_ops_450_.count(inst->GetSingleWordInOperand(1)) != 0);
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}
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bool ConvertToHalfPass::IsFloat(Instruction* inst, uint32_t width) {
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uint32_t ty_id = inst->type_id();
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if (ty_id == 0) return false;
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return Pass::IsFloat(ty_id, width);
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}
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bool ConvertToHalfPass::IsStruct(Instruction* inst) {
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uint32_t ty_id = inst->type_id();
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if (ty_id == 0) return false;
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Instruction* ty_inst = Pass::GetBaseType(ty_id);
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return (ty_inst->opcode() == spv::Op::OpTypeStruct);
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}
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bool ConvertToHalfPass::IsDecoratedRelaxed(Instruction* inst) {
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uint32_t r_id = inst->result_id();
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for (auto r_inst : get_decoration_mgr()->GetDecorationsFor(r_id, false))
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if (r_inst->opcode() == spv::Op::OpDecorate &&
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spv::Decoration(r_inst->GetSingleWordInOperand(1)) ==
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spv::Decoration::RelaxedPrecision) {
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return true;
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}
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return false;
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}
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bool ConvertToHalfPass::IsRelaxed(uint32_t id) {
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return relaxed_ids_set_.count(id) > 0;
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}
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void ConvertToHalfPass::AddRelaxed(uint32_t id) { relaxed_ids_set_.insert(id); }
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bool ConvertToHalfPass::CanRelaxOpOperands(Instruction* inst) {
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return image_ops_.count(inst->opcode()) == 0;
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}
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analysis::Type* ConvertToHalfPass::FloatScalarType(uint32_t width) {
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analysis::Float float_ty(width);
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return context()->get_type_mgr()->GetRegisteredType(&float_ty);
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}
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analysis::Type* ConvertToHalfPass::FloatVectorType(uint32_t v_len,
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uint32_t width) {
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analysis::Type* reg_float_ty = FloatScalarType(width);
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analysis::Vector vec_ty(reg_float_ty, v_len);
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return context()->get_type_mgr()->GetRegisteredType(&vec_ty);
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}
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analysis::Type* ConvertToHalfPass::FloatMatrixType(uint32_t v_cnt,
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uint32_t vty_id,
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uint32_t width) {
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Instruction* vty_inst = get_def_use_mgr()->GetDef(vty_id);
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uint32_t v_len = vty_inst->GetSingleWordInOperand(1);
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analysis::Type* reg_vec_ty = FloatVectorType(v_len, width);
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analysis::Matrix mat_ty(reg_vec_ty, v_cnt);
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return context()->get_type_mgr()->GetRegisteredType(&mat_ty);
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}
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uint32_t ConvertToHalfPass::EquivFloatTypeId(uint32_t ty_id, uint32_t width) {
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analysis::Type* reg_equiv_ty;
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Instruction* ty_inst = get_def_use_mgr()->GetDef(ty_id);
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if (ty_inst->opcode() == spv::Op::OpTypeMatrix)
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reg_equiv_ty = FloatMatrixType(ty_inst->GetSingleWordInOperand(1),
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ty_inst->GetSingleWordInOperand(0), width);
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else if (ty_inst->opcode() == spv::Op::OpTypeVector)
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reg_equiv_ty = FloatVectorType(ty_inst->GetSingleWordInOperand(1), width);
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else // spv::Op::OpTypeFloat
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reg_equiv_ty = FloatScalarType(width);
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return context()->get_type_mgr()->GetTypeInstruction(reg_equiv_ty);
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}
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void ConvertToHalfPass::GenConvert(uint32_t* val_idp, uint32_t width,
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Instruction* inst) {
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Instruction* val_inst = get_def_use_mgr()->GetDef(*val_idp);
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uint32_t ty_id = val_inst->type_id();
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uint32_t nty_id = EquivFloatTypeId(ty_id, width);
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if (nty_id == ty_id) return;
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Instruction* cvt_inst;
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InstructionBuilder builder(
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context(), inst,
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IRContext::kAnalysisDefUse | IRContext::kAnalysisInstrToBlockMapping);
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if (val_inst->opcode() == spv::Op::OpUndef)
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cvt_inst = builder.AddNullaryOp(nty_id, spv::Op::OpUndef);
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else
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cvt_inst = builder.AddUnaryOp(nty_id, spv::Op::OpFConvert, *val_idp);
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*val_idp = cvt_inst->result_id();
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}
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bool ConvertToHalfPass::MatConvertCleanup(Instruction* inst) {
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if (inst->opcode() != spv::Op::OpFConvert) return false;
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uint32_t mty_id = inst->type_id();
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Instruction* mty_inst = get_def_use_mgr()->GetDef(mty_id);
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if (mty_inst->opcode() != spv::Op::OpTypeMatrix) return false;
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uint32_t vty_id = mty_inst->GetSingleWordInOperand(0);
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uint32_t v_cnt = mty_inst->GetSingleWordInOperand(1);
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Instruction* vty_inst = get_def_use_mgr()->GetDef(vty_id);
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uint32_t cty_id = vty_inst->GetSingleWordInOperand(0);
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Instruction* cty_inst = get_def_use_mgr()->GetDef(cty_id);
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InstructionBuilder builder(
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context(), inst,
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IRContext::kAnalysisDefUse | IRContext::kAnalysisInstrToBlockMapping);
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// Convert each component vector, combine them with OpCompositeConstruct
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// and replace original instruction.
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uint32_t orig_width = (cty_inst->GetSingleWordInOperand(0) == 16) ? 32 : 16;
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uint32_t orig_mat_id = inst->GetSingleWordInOperand(0);
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uint32_t orig_vty_id = EquivFloatTypeId(vty_id, orig_width);
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std::vector<Operand> opnds = {};
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for (uint32_t vidx = 0; vidx < v_cnt; ++vidx) {
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Instruction* ext_inst = builder.AddIdLiteralOp(
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orig_vty_id, spv::Op::OpCompositeExtract, orig_mat_id, vidx);
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Instruction* cvt_inst =
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builder.AddUnaryOp(vty_id, spv::Op::OpFConvert, ext_inst->result_id());
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opnds.push_back({SPV_OPERAND_TYPE_ID, {cvt_inst->result_id()}});
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}
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uint32_t mat_id = TakeNextId();
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std::unique_ptr<Instruction> mat_inst(new Instruction(
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context(), spv::Op::OpCompositeConstruct, mty_id, mat_id, opnds));
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(void)builder.AddInstruction(std::move(mat_inst));
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context()->ReplaceAllUsesWith(inst->result_id(), mat_id);
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// Turn original instruction into copy so it is valid.
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inst->SetOpcode(spv::Op::OpCopyObject);
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inst->SetResultType(EquivFloatTypeId(mty_id, orig_width));
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get_def_use_mgr()->AnalyzeInstUse(inst);
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return true;
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}
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bool ConvertToHalfPass::RemoveRelaxedDecoration(uint32_t id) {
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return context()->get_decoration_mgr()->RemoveDecorationsFrom(
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id, [](const Instruction& dec) {
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if (dec.opcode() == spv::Op::OpDecorate &&
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spv::Decoration(dec.GetSingleWordInOperand(1u)) ==
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spv::Decoration::RelaxedPrecision) {
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return true;
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} else
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return false;
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});
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}
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bool ConvertToHalfPass::GenHalfArith(Instruction* inst) {
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bool modified = false;
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// If this is a OpCompositeExtract instruction and has a struct operand, we
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// should not relax this instruction. Doing so could cause a mismatch between
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// the result type and the struct member type.
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bool hasStructOperand = false;
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if (inst->opcode() == spv::Op::OpCompositeExtract) {
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inst->ForEachInId([&hasStructOperand, this](uint32_t* idp) {
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Instruction* op_inst = get_def_use_mgr()->GetDef(*idp);
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if (IsStruct(op_inst)) hasStructOperand = true;
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});
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if (hasStructOperand) {
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return false;
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}
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}
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// Convert all float32 based operands to float16 equivalent and change
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// instruction type to float16 equivalent.
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inst->ForEachInId([&inst, &modified, this](uint32_t* idp) {
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Instruction* op_inst = get_def_use_mgr()->GetDef(*idp);
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if (!IsFloat(op_inst, 32)) return;
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GenConvert(idp, 16, inst);
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modified = true;
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});
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if (IsFloat(inst, 32)) {
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inst->SetResultType(EquivFloatTypeId(inst->type_id(), 16));
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converted_ids_.insert(inst->result_id());
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modified = true;
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}
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if (modified) get_def_use_mgr()->AnalyzeInstUse(inst);
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return modified;
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}
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bool ConvertToHalfPass::ProcessPhi(Instruction* inst, uint32_t from_width,
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uint32_t to_width) {
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// Add converts of any float operands to to_width if they are of from_width.
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// If converting to 16, change type of phi to float16 equivalent and remember
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// result id. Converts need to be added to preceding blocks.
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uint32_t ocnt = 0;
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uint32_t* prev_idp;
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bool modified = false;
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inst->ForEachInId([&ocnt, &prev_idp, &from_width, &to_width, &modified,
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this](uint32_t* idp) {
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if (ocnt % 2 == 0) {
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prev_idp = idp;
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} else {
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Instruction* val_inst = get_def_use_mgr()->GetDef(*prev_idp);
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if (IsFloat(val_inst, from_width)) {
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BasicBlock* bp = context()->get_instr_block(*idp);
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auto insert_before = bp->tail();
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if (insert_before != bp->begin()) {
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--insert_before;
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if (insert_before->opcode() != spv::Op::OpSelectionMerge &&
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insert_before->opcode() != spv::Op::OpLoopMerge)
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++insert_before;
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}
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GenConvert(prev_idp, to_width, &*insert_before);
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modified = true;
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}
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}
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++ocnt;
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});
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if (to_width == 16u) {
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inst->SetResultType(EquivFloatTypeId(inst->type_id(), 16u));
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converted_ids_.insert(inst->result_id());
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modified = true;
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}
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if (modified) get_def_use_mgr()->AnalyzeInstUse(inst);
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return modified;
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}
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bool ConvertToHalfPass::ProcessConvert(Instruction* inst) {
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// If float32 and relaxed, change to float16 convert
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if (IsFloat(inst, 32) && IsRelaxed(inst->result_id())) {
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inst->SetResultType(EquivFloatTypeId(inst->type_id(), 16));
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get_def_use_mgr()->AnalyzeInstUse(inst);
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converted_ids_.insert(inst->result_id());
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}
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// If operand and result types are the same, change FConvert to CopyObject to
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// keep validator happy; simplification and DCE will clean it up
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// One way this can happen is if an FConvert generated during this pass
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// (likely by ProcessPhi) is later encountered here and its operand has been
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// changed to half.
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uint32_t val_id = inst->GetSingleWordInOperand(0);
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Instruction* val_inst = get_def_use_mgr()->GetDef(val_id);
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if (inst->type_id() == val_inst->type_id())
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inst->SetOpcode(spv::Op::OpCopyObject);
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return true; // modified
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}
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bool ConvertToHalfPass::ProcessImageRef(Instruction* inst) {
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bool modified = false;
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// If image reference, only need to convert dref args back to float32
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if (dref_image_ops_.count(inst->opcode()) != 0) {
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uint32_t dref_id = inst->GetSingleWordInOperand(kImageSampleDrefIdInIdx);
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if (converted_ids_.count(dref_id) > 0) {
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GenConvert(&dref_id, 32, inst);
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inst->SetInOperand(kImageSampleDrefIdInIdx, {dref_id});
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get_def_use_mgr()->AnalyzeInstUse(inst);
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modified = true;
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}
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}
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return modified;
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}
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bool ConvertToHalfPass::ProcessDefault(Instruction* inst) {
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// If non-relaxed instruction has changed operands, need to convert
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// them back to float32
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if (inst->opcode() == spv::Op::OpPhi) return ProcessPhi(inst, 16u, 32u);
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bool modified = false;
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inst->ForEachInId([&inst, &modified, this](uint32_t* idp) {
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if (converted_ids_.count(*idp) == 0) return;
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uint32_t old_id = *idp;
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GenConvert(idp, 32, inst);
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if (*idp != old_id) modified = true;
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});
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if (modified) get_def_use_mgr()->AnalyzeInstUse(inst);
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return modified;
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}
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bool ConvertToHalfPass::GenHalfInst(Instruction* inst) {
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bool modified = false;
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// Remember id for later deletion of RelaxedPrecision decoration
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bool inst_relaxed = IsRelaxed(inst->result_id());
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if (IsArithmetic(inst) && inst_relaxed)
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modified = GenHalfArith(inst);
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else if (inst->opcode() == spv::Op::OpPhi && inst_relaxed)
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modified = ProcessPhi(inst, 32u, 16u);
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else if (inst->opcode() == spv::Op::OpFConvert)
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modified = ProcessConvert(inst);
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else if (image_ops_.count(inst->opcode()) != 0)
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modified = ProcessImageRef(inst);
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else
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modified = ProcessDefault(inst);
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return modified;
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}
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bool ConvertToHalfPass::CloseRelaxInst(Instruction* inst) {
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if (inst->result_id() == 0) return false;
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if (IsRelaxed(inst->result_id())) return false;
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if (!IsFloat(inst, 32)) return false;
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if (IsDecoratedRelaxed(inst)) {
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AddRelaxed(inst->result_id());
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return true;
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}
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if (closure_ops_.count(inst->opcode()) == 0) return false;
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// Can relax if all float operands are relaxed
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bool relax = true;
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bool hasStructOperand = false;
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inst->ForEachInId([&relax, &hasStructOperand, this](uint32_t* idp) {
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Instruction* op_inst = get_def_use_mgr()->GetDef(*idp);
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if (IsStruct(op_inst)) hasStructOperand = true;
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if (!IsFloat(op_inst, 32)) return;
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if (!IsRelaxed(*idp)) relax = false;
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});
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// If the instruction has a struct operand, we should not relax it, even if
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// all its uses are relaxed. Doing so could cause a mismatch between the
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// result type and the struct member type.
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if (hasStructOperand) {
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return false;
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}
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if (relax) {
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AddRelaxed(inst->result_id());
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return true;
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}
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// Can relax if all uses are relaxed
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relax = true;
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get_def_use_mgr()->ForEachUser(inst, [&relax, this](Instruction* uinst) {
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if (uinst->result_id() == 0 || !IsFloat(uinst, 32) ||
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(!IsDecoratedRelaxed(uinst) && !IsRelaxed(uinst->result_id())) ||
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!CanRelaxOpOperands(uinst)) {
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relax = false;
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return;
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}
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});
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if (relax) {
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AddRelaxed(inst->result_id());
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return true;
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}
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return false;
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}
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bool ConvertToHalfPass::ProcessFunction(Function* func) {
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// Do a closure of Relaxed on composite and phi instructions
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bool changed = true;
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while (changed) {
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changed = false;
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cfg()->ForEachBlockInReversePostOrder(
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func->entry().get(), [&changed, this](BasicBlock* bb) {
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for (auto ii = bb->begin(); ii != bb->end(); ++ii)
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changed |= CloseRelaxInst(&*ii);
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});
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}
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// Do convert of relaxed instructions to half precision
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bool modified = false;
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cfg()->ForEachBlockInReversePostOrder(
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func->entry().get(), [&modified, this](BasicBlock* bb) {
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for (auto ii = bb->begin(); ii != bb->end(); ++ii)
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modified |= GenHalfInst(&*ii);
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});
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// Replace invalid converts of matrix into equivalent vector extracts,
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// converts and finally a composite construct
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cfg()->ForEachBlockInReversePostOrder(
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func->entry().get(), [&modified, this](BasicBlock* bb) {
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for (auto ii = bb->begin(); ii != bb->end(); ++ii)
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modified |= MatConvertCleanup(&*ii);
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});
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return modified;
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}
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Pass::Status ConvertToHalfPass::ProcessImpl() {
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Pass::ProcessFunction pfn = [this](Function* fp) {
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return ProcessFunction(fp);
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};
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bool modified = context()->ProcessReachableCallTree(pfn);
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// If modified, make sure module has Float16 capability
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if (modified) context()->AddCapability(spv::Capability::Float16);
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// Remove all RelaxedPrecision decorations from instructions and globals
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for (auto c_id : relaxed_ids_set_) {
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modified |= RemoveRelaxedDecoration(c_id);
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}
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for (auto& val : get_module()->types_values()) {
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uint32_t v_id = val.result_id();
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if (v_id != 0) {
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modified |= RemoveRelaxedDecoration(v_id);
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}
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}
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return modified ? Status::SuccessWithChange : Status::SuccessWithoutChange;
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}
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Pass::Status ConvertToHalfPass::Process() {
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Initialize();
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return ProcessImpl();
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}
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void ConvertToHalfPass::Initialize() {
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target_ops_core_ = {
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spv::Op::OpVectorExtractDynamic,
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spv::Op::OpVectorInsertDynamic,
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spv::Op::OpVectorShuffle,
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spv::Op::OpCompositeConstruct,
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spv::Op::OpCompositeInsert,
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spv::Op::OpCompositeExtract,
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spv::Op::OpCopyObject,
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spv::Op::OpTranspose,
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spv::Op::OpConvertSToF,
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spv::Op::OpConvertUToF,
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// spv::Op::OpFConvert,
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// spv::Op::OpQuantizeToF16,
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spv::Op::OpFNegate,
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spv::Op::OpFAdd,
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spv::Op::OpFSub,
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spv::Op::OpFMul,
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spv::Op::OpFDiv,
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spv::Op::OpFMod,
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spv::Op::OpVectorTimesScalar,
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spv::Op::OpMatrixTimesScalar,
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spv::Op::OpVectorTimesMatrix,
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spv::Op::OpMatrixTimesVector,
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spv::Op::OpMatrixTimesMatrix,
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spv::Op::OpOuterProduct,
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spv::Op::OpDot,
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spv::Op::OpSelect,
|
|
spv::Op::OpFOrdEqual,
|
|
spv::Op::OpFUnordEqual,
|
|
spv::Op::OpFOrdNotEqual,
|
|
spv::Op::OpFUnordNotEqual,
|
|
spv::Op::OpFOrdLessThan,
|
|
spv::Op::OpFUnordLessThan,
|
|
spv::Op::OpFOrdGreaterThan,
|
|
spv::Op::OpFUnordGreaterThan,
|
|
spv::Op::OpFOrdLessThanEqual,
|
|
spv::Op::OpFUnordLessThanEqual,
|
|
spv::Op::OpFOrdGreaterThanEqual,
|
|
spv::Op::OpFUnordGreaterThanEqual,
|
|
};
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|
target_ops_450_ = {
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|
GLSLstd450Round, GLSLstd450RoundEven, GLSLstd450Trunc, GLSLstd450FAbs,
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|
GLSLstd450FSign, GLSLstd450Floor, GLSLstd450Ceil, GLSLstd450Fract,
|
|
GLSLstd450Radians, GLSLstd450Degrees, GLSLstd450Sin, GLSLstd450Cos,
|
|
GLSLstd450Tan, GLSLstd450Asin, GLSLstd450Acos, GLSLstd450Atan,
|
|
GLSLstd450Sinh, GLSLstd450Cosh, GLSLstd450Tanh, GLSLstd450Asinh,
|
|
GLSLstd450Acosh, GLSLstd450Atanh, GLSLstd450Atan2, GLSLstd450Pow,
|
|
GLSLstd450Exp, GLSLstd450Log, GLSLstd450Exp2, GLSLstd450Log2,
|
|
GLSLstd450Sqrt, GLSLstd450InverseSqrt, GLSLstd450Determinant,
|
|
GLSLstd450MatrixInverse,
|
|
// TODO(greg-lunarg): GLSLstd450ModfStruct,
|
|
GLSLstd450FMin, GLSLstd450FMax, GLSLstd450FClamp, GLSLstd450FMix,
|
|
GLSLstd450Step, GLSLstd450SmoothStep, GLSLstd450Fma,
|
|
// TODO(greg-lunarg): GLSLstd450FrexpStruct,
|
|
GLSLstd450Ldexp, GLSLstd450Length, GLSLstd450Distance, GLSLstd450Cross,
|
|
GLSLstd450Normalize, GLSLstd450FaceForward, GLSLstd450Reflect,
|
|
GLSLstd450Refract, GLSLstd450NMin, GLSLstd450NMax, GLSLstd450NClamp};
|
|
image_ops_ = {spv::Op::OpImageSampleImplicitLod,
|
|
spv::Op::OpImageSampleExplicitLod,
|
|
spv::Op::OpImageSampleDrefImplicitLod,
|
|
spv::Op::OpImageSampleDrefExplicitLod,
|
|
spv::Op::OpImageSampleProjImplicitLod,
|
|
spv::Op::OpImageSampleProjExplicitLod,
|
|
spv::Op::OpImageSampleProjDrefImplicitLod,
|
|
spv::Op::OpImageSampleProjDrefExplicitLod,
|
|
spv::Op::OpImageFetch,
|
|
spv::Op::OpImageGather,
|
|
spv::Op::OpImageDrefGather,
|
|
spv::Op::OpImageRead,
|
|
spv::Op::OpImageSparseSampleImplicitLod,
|
|
spv::Op::OpImageSparseSampleExplicitLod,
|
|
spv::Op::OpImageSparseSampleDrefImplicitLod,
|
|
spv::Op::OpImageSparseSampleDrefExplicitLod,
|
|
spv::Op::OpImageSparseSampleProjImplicitLod,
|
|
spv::Op::OpImageSparseSampleProjExplicitLod,
|
|
spv::Op::OpImageSparseSampleProjDrefImplicitLod,
|
|
spv::Op::OpImageSparseSampleProjDrefExplicitLod,
|
|
spv::Op::OpImageSparseFetch,
|
|
spv::Op::OpImageSparseGather,
|
|
spv::Op::OpImageSparseDrefGather,
|
|
spv::Op::OpImageSparseTexelsResident,
|
|
spv::Op::OpImageSparseRead};
|
|
dref_image_ops_ = {
|
|
spv::Op::OpImageSampleDrefImplicitLod,
|
|
spv::Op::OpImageSampleDrefExplicitLod,
|
|
spv::Op::OpImageSampleProjDrefImplicitLod,
|
|
spv::Op::OpImageSampleProjDrefExplicitLod,
|
|
spv::Op::OpImageDrefGather,
|
|
spv::Op::OpImageSparseSampleDrefImplicitLod,
|
|
spv::Op::OpImageSparseSampleDrefExplicitLod,
|
|
spv::Op::OpImageSparseSampleProjDrefImplicitLod,
|
|
spv::Op::OpImageSparseSampleProjDrefExplicitLod,
|
|
spv::Op::OpImageSparseDrefGather,
|
|
};
|
|
closure_ops_ = {
|
|
spv::Op::OpVectorExtractDynamic,
|
|
spv::Op::OpVectorInsertDynamic,
|
|
spv::Op::OpVectorShuffle,
|
|
spv::Op::OpCompositeConstruct,
|
|
spv::Op::OpCompositeInsert,
|
|
spv::Op::OpCompositeExtract,
|
|
spv::Op::OpCopyObject,
|
|
spv::Op::OpTranspose,
|
|
spv::Op::OpPhi,
|
|
};
|
|
relaxed_ids_set_.clear();
|
|
converted_ids_.clear();
|
|
}
|
|
|
|
} // namespace opt
|
|
} // namespace spvtools
|