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https://github.com/KhronosGroup/SPIRV-Tools
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82df4bbd68
The pass checks if arithmetic operations (such as OpFMul) receive correct operands.
137 lines
4.6 KiB
C++
137 lines
4.6 KiB
C++
// Copyright (c) 2017 Google Inc.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// Ensures type declarations are unique unless allowed by the specification.
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#include "validate.h"
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#include "diagnostic.h"
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#include "opcode.h"
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#include "val/instruction.h"
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#include "val/validation_state.h"
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namespace libspirv {
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namespace {
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// Returns operand word for given instruction and operand index.
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// The operand is expected to only have one word.
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inline uint32_t GetOperandWord(const spv_parsed_instruction_t* inst,
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size_t operand_index) {
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assert(operand_index < inst->num_operands);
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const spv_parsed_operand_t& operand = inst->operands[operand_index];
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assert(operand.num_words == 1);
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return inst->words[operand.offset];
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}
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}
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// Validates correctness of arithmetic instructions.
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spv_result_t ArithmeticsPass(ValidationState_t& _,
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const spv_parsed_instruction_t* inst) {
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const SpvOp opcode = static_cast<SpvOp>(inst->opcode);
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switch (opcode) {
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case SpvOpFAdd:
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case SpvOpFSub:
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case SpvOpFMul:
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case SpvOpFDiv:
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case SpvOpFRem:
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case SpvOpFMod:
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case SpvOpFNegate: {
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if (!_.IsFloatScalarType(inst->type_id) &&
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!_.IsFloatVectorType(inst->type_id))
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return _.diag(SPV_ERROR_INVALID_DATA)
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<< "Expected floating scalar or vector type as type_id: "
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<< spvOpcodeString(opcode);
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for (size_t operand_index = 2; operand_index < inst->num_operands;
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++operand_index) {
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if (_.GetTypeId(GetOperandWord(inst, operand_index)) != inst->type_id)
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return _.diag(SPV_ERROR_INVALID_DATA)
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<< "Expected arithmetic operands to have type type_id: "
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<< spvOpcodeString(opcode) << " operand index " << operand_index;
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}
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break;
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}
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case SpvOpUDiv:
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case SpvOpUMod: {
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if (!_.IsUnsignedIntScalarType(inst->type_id) &&
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!_.IsUnsignedIntVectorType(inst->type_id))
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return _.diag(SPV_ERROR_INVALID_DATA)
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<< "Expected unsigned int scalar or vector type as type_id: "
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<< spvOpcodeString(opcode);
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for (size_t operand_index = 2; operand_index < inst->num_operands;
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++operand_index) {
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if (_.GetTypeId(GetOperandWord(inst, operand_index)) != inst->type_id)
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return _.diag(SPV_ERROR_INVALID_DATA)
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<< "Expected arithmetic operands to have type type_id: "
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<< spvOpcodeString(opcode) << " operand index " << operand_index;
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}
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break;
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}
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case SpvOpISub:
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case SpvOpIAdd:
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case SpvOpIMul:
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case SpvOpSDiv:
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case SpvOpSMod:
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case SpvOpSRem:
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case SpvOpSNegate: {
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if (!_.IsIntScalarType(inst->type_id) &&
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!_.IsIntVectorType(inst->type_id))
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return _.diag(SPV_ERROR_INVALID_DATA)
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<< "Expected int scalar or vector type as type_id: "
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<< spvOpcodeString(opcode);
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const uint32_t dimension = _.GetDimension(inst->type_id);
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const uint32_t bit_width = _.GetBitWidth(inst->type_id);
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for (size_t operand_index = 2; operand_index < inst->num_operands;
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++operand_index) {
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const uint32_t type_id =
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_.GetTypeId(GetOperandWord(inst, operand_index));
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if (!type_id ||
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(!_.IsIntScalarType(type_id) && !_.IsIntVectorType(type_id)))
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return _.diag(SPV_ERROR_INVALID_DATA)
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<< "Expected int scalar or vector type as operand: "
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<< spvOpcodeString(opcode) << " operand index " << operand_index;
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if (_.GetDimension(type_id) != dimension)
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return _.diag(SPV_ERROR_INVALID_DATA)
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<< "Expected arithmetic operands to have the same dimension "
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<< "as type_id: "
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<< spvOpcodeString(opcode) << " operand index " << operand_index;
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if (_.GetBitWidth(type_id) != bit_width)
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return _.diag(SPV_ERROR_INVALID_DATA)
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<< "Expected arithmetic operands to have the same bit width "
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<< "as type_id: "
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<< spvOpcodeString(opcode) << " operand index " << operand_index;
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}
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break;
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}
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default:
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break;
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}
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return SPV_SUCCESS;
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}
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} // namespace libspirv
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