mirror of
https://github.com/KhronosGroup/SPIRV-Tools
synced 2024-12-27 10:20:14 +00:00
36185f8b09
This PR converts IRContext parameter in fact managers into a class field. Part of #3698.
415 lines
17 KiB
C++
415 lines
17 KiB
C++
// Copyright (c) 2020 Google LLC
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "source/fuzz/fuzzer_pass_add_equation_instructions.h"
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#include <vector>
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#include "source/fuzz/fuzzer_util.h"
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#include "source/fuzz/transformation_equation_instruction.h"
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namespace spvtools {
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namespace fuzz {
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namespace {
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bool IsBitWidthSupported(opt::IRContext* ir_context, uint32_t bit_width) {
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switch (bit_width) {
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case 32:
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return true;
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case 64:
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return ir_context->get_feature_mgr()->HasCapability(
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SpvCapabilityFloat64) &&
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ir_context->get_feature_mgr()->HasCapability(SpvCapabilityInt64);
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case 16:
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return ir_context->get_feature_mgr()->HasCapability(
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SpvCapabilityFloat16) &&
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ir_context->get_feature_mgr()->HasCapability(SpvCapabilityInt16);
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default:
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return false;
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}
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}
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} // namespace
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FuzzerPassAddEquationInstructions::FuzzerPassAddEquationInstructions(
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opt::IRContext* ir_context, TransformationContext* transformation_context,
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FuzzerContext* fuzzer_context,
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protobufs::TransformationSequence* transformations)
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: FuzzerPass(ir_context, transformation_context, fuzzer_context,
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transformations) {}
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FuzzerPassAddEquationInstructions::~FuzzerPassAddEquationInstructions() =
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default;
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void FuzzerPassAddEquationInstructions::Apply() {
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ForEachInstructionWithInstructionDescriptor(
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[this](opt::Function* function, opt::BasicBlock* block,
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opt::BasicBlock::iterator inst_it,
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const protobufs::InstructionDescriptor& instruction_descriptor) {
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if (!GetFuzzerContext()->ChoosePercentage(
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GetFuzzerContext()->GetChanceOfAddingEquationInstruction())) {
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return;
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}
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// Check that it is OK to add an equation instruction before the given
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// instruction in principle - e.g. check that this does not lead to
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// inserting before an OpVariable or OpPhi instruction. We use OpIAdd
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// as an example opcode for this check, to be representative of *some*
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// opcode that defines an equation, even though we may choose a
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// different opcode below.
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if (!fuzzerutil::CanInsertOpcodeBeforeInstruction(SpvOpIAdd, inst_it)) {
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return;
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}
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// Get all available instructions with result ids and types that are not
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// OpUndef.
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std::vector<opt::Instruction*> available_instructions =
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FindAvailableInstructions(
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function, block, inst_it,
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[this](opt::IRContext* /*unused*/,
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opt::Instruction* instruction) -> bool {
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return instruction->result_id() && instruction->type_id() &&
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instruction->opcode() != SpvOpUndef &&
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!GetTransformationContext()
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->GetFactManager()
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->IdIsIrrelevant(instruction->result_id());
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});
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// Try the opcodes for which we know how to make ids at random until
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// something works.
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std::vector<SpvOp> candidate_opcodes = {
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SpvOpIAdd, SpvOpISub, SpvOpLogicalNot, SpvOpSNegate,
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SpvOpConvertUToF, SpvOpConvertSToF, SpvOpBitcast};
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do {
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auto opcode =
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GetFuzzerContext()->RemoveAtRandomIndex(&candidate_opcodes);
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switch (opcode) {
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case SpvOpConvertSToF:
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case SpvOpConvertUToF: {
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std::vector<const opt::Instruction*> candidate_instructions;
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for (const auto* inst :
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GetIntegerInstructions(available_instructions)) {
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const auto* type =
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GetIRContext()->get_type_mgr()->GetType(inst->type_id());
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assert(type && "|inst| has invalid type");
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if (const auto* vector_type = type->AsVector()) {
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type = vector_type->element_type();
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}
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if (IsBitWidthSupported(GetIRContext(),
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type->AsInteger()->width())) {
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candidate_instructions.push_back(inst);
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}
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}
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if (candidate_instructions.empty()) {
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break;
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}
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const auto* operand =
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candidate_instructions[GetFuzzerContext()->RandomIndex(
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candidate_instructions)];
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const auto* type =
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GetIRContext()->get_type_mgr()->GetType(operand->type_id());
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assert(type && "Operand has invalid type");
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// Make sure a result type exists in the module.
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if (const auto* vector = type->AsVector()) {
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// We store element count in a separate variable since the
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// call FindOrCreate* functions below might invalidate
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// |vector| pointer.
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const auto element_count = vector->element_count();
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FindOrCreateVectorType(
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FindOrCreateFloatType(
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vector->element_type()->AsInteger()->width()),
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element_count);
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} else {
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FindOrCreateFloatType(type->AsInteger()->width());
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}
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ApplyTransformation(TransformationEquationInstruction(
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GetFuzzerContext()->GetFreshId(), opcode,
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{operand->result_id()}, instruction_descriptor));
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return;
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}
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case SpvOpBitcast: {
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const auto candidate_instructions =
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GetNumericalInstructions(available_instructions);
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if (!candidate_instructions.empty()) {
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const auto* operand_inst =
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candidate_instructions[GetFuzzerContext()->RandomIndex(
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candidate_instructions)];
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const auto* operand_type =
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GetIRContext()->get_type_mgr()->GetType(
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operand_inst->type_id());
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assert(operand_type && "Operand instruction has invalid type");
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// Make sure a result type exists in the module.
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//
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// TODO(https://github.com/KhronosGroup/SPIRV-Tools/issues/3539):
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// The only constraint on the types of OpBitcast's parameters
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// is that they must have the same number of bits. Consider
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// improving the code below to support this in full.
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if (const auto* vector = operand_type->AsVector()) {
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// We store element count in a separate variable since the
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// call FindOrCreate* functions below might invalidate
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// |vector| pointer.
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const auto element_count = vector->element_count();
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uint32_t element_type_id;
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if (const auto* int_type =
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vector->element_type()->AsInteger()) {
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element_type_id = FindOrCreateFloatType(int_type->width());
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} else {
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assert(vector->element_type()->AsFloat() &&
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"Vector must have numerical elements");
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element_type_id = FindOrCreateIntegerType(
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vector->element_type()->AsFloat()->width(),
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GetFuzzerContext()->ChooseEven());
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}
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FindOrCreateVectorType(element_type_id, element_count);
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} else if (const auto* int_type = operand_type->AsInteger()) {
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FindOrCreateFloatType(int_type->width());
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} else {
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assert(operand_type->AsFloat() &&
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"Operand is not a scalar of numerical type");
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FindOrCreateIntegerType(operand_type->AsFloat()->width(),
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GetFuzzerContext()->ChooseEven());
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}
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ApplyTransformation(TransformationEquationInstruction(
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GetFuzzerContext()->GetFreshId(), opcode,
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{operand_inst->result_id()}, instruction_descriptor));
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return;
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}
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} break;
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case SpvOpIAdd:
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case SpvOpISub: {
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// Instructions of integer (scalar or vector) result type are
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// suitable for these opcodes.
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auto integer_instructions =
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GetIntegerInstructions(available_instructions);
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if (!integer_instructions.empty()) {
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// There is at least one such instruction, so pick one at random
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// for the LHS of an equation.
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auto lhs = integer_instructions.at(
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GetFuzzerContext()->RandomIndex(integer_instructions));
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// For the RHS, we can use any instruction with an integer
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// scalar/vector result type of the same number of components
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// and the same bit-width for the underlying integer type.
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// Work out the element count and bit-width.
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auto lhs_type =
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GetIRContext()->get_type_mgr()->GetType(lhs->type_id());
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uint32_t lhs_element_count;
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uint32_t lhs_bit_width;
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if (lhs_type->AsVector()) {
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lhs_element_count = lhs_type->AsVector()->element_count();
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lhs_bit_width = lhs_type->AsVector()
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->element_type()
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->AsInteger()
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->width();
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} else {
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lhs_element_count = 1;
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lhs_bit_width = lhs_type->AsInteger()->width();
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}
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// Get all the instructions that match on element count and
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// bit-width.
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auto candidate_rhs_instructions = RestrictToElementBitWidth(
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RestrictToVectorWidth(integer_instructions,
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lhs_element_count),
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lhs_bit_width);
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// Choose a RHS instruction at random; there is guaranteed to
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// be at least one choice as the LHS will be available.
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auto rhs = candidate_rhs_instructions.at(
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GetFuzzerContext()->RandomIndex(
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candidate_rhs_instructions));
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// Add the equation instruction.
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ApplyTransformation(TransformationEquationInstruction(
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GetFuzzerContext()->GetFreshId(), opcode,
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{lhs->result_id(), rhs->result_id()},
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instruction_descriptor));
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return;
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}
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break;
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}
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case SpvOpLogicalNot: {
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// Choose any available instruction of boolean scalar/vector
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// result type and equate its negation with a fresh id.
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auto boolean_instructions =
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GetBooleanInstructions(available_instructions);
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if (!boolean_instructions.empty()) {
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ApplyTransformation(TransformationEquationInstruction(
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GetFuzzerContext()->GetFreshId(), opcode,
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{boolean_instructions
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.at(GetFuzzerContext()->RandomIndex(
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boolean_instructions))
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->result_id()},
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instruction_descriptor));
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return;
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}
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break;
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}
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case SpvOpSNegate: {
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// Similar to OpLogicalNot, but for signed integer negation.
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auto integer_instructions =
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GetIntegerInstructions(available_instructions);
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if (!integer_instructions.empty()) {
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ApplyTransformation(TransformationEquationInstruction(
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GetFuzzerContext()->GetFreshId(), opcode,
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{integer_instructions
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.at(GetFuzzerContext()->RandomIndex(
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integer_instructions))
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->result_id()},
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instruction_descriptor));
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return;
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}
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break;
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}
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default:
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assert(false && "Unexpected opcode.");
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break;
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}
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} while (!candidate_opcodes.empty());
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// Reaching here means that we did not manage to apply any
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// transformation at this point of the module.
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});
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}
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std::vector<opt::Instruction*>
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FuzzerPassAddEquationInstructions::GetIntegerInstructions(
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const std::vector<opt::Instruction*>& instructions) const {
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std::vector<opt::Instruction*> result;
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for (auto& inst : instructions) {
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auto type = GetIRContext()->get_type_mgr()->GetType(inst->type_id());
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if (type->AsInteger() ||
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(type->AsVector() && type->AsVector()->element_type()->AsInteger())) {
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result.push_back(inst);
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}
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}
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return result;
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}
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std::vector<opt::Instruction*>
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FuzzerPassAddEquationInstructions::GetFloatInstructions(
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const std::vector<opt::Instruction*>& instructions) const {
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std::vector<opt::Instruction*> result;
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for (auto& inst : instructions) {
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auto type = GetIRContext()->get_type_mgr()->GetType(inst->type_id());
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if (type->AsFloat() ||
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(type->AsVector() && type->AsVector()->element_type()->AsFloat())) {
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result.push_back(inst);
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}
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}
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return result;
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}
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std::vector<opt::Instruction*>
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FuzzerPassAddEquationInstructions::GetBooleanInstructions(
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const std::vector<opt::Instruction*>& instructions) const {
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std::vector<opt::Instruction*> result;
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for (auto& inst : instructions) {
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auto type = GetIRContext()->get_type_mgr()->GetType(inst->type_id());
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if (type->AsBool() ||
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(type->AsVector() && type->AsVector()->element_type()->AsBool())) {
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result.push_back(inst);
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}
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}
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return result;
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}
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std::vector<opt::Instruction*>
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FuzzerPassAddEquationInstructions::RestrictToVectorWidth(
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const std::vector<opt::Instruction*>& instructions,
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uint32_t vector_width) const {
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std::vector<opt::Instruction*> result;
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for (auto& inst : instructions) {
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auto type = GetIRContext()->get_type_mgr()->GetType(inst->type_id());
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// Get the vector width of |inst|, which is 1 if |inst| is a scalar and is
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// otherwise derived from its vector type.
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uint32_t other_vector_width =
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type->AsVector() ? type->AsVector()->element_count() : 1;
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// Keep |inst| if the vector widths match.
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if (vector_width == other_vector_width) {
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result.push_back(inst);
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}
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}
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return result;
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}
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std::vector<opt::Instruction*>
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FuzzerPassAddEquationInstructions::RestrictToElementBitWidth(
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const std::vector<opt::Instruction*>& instructions,
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uint32_t bit_width) const {
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std::vector<opt::Instruction*> result;
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for (auto& inst : instructions) {
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const opt::analysis::Type* type =
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GetIRContext()->get_type_mgr()->GetType(inst->type_id());
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if (type->AsVector()) {
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type = type->AsVector()->element_type();
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}
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assert((type->AsInteger() || type->AsFloat()) &&
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"Precondition: all input instructions must "
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"have integer or float scalar or vector type.");
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if ((type->AsInteger() && type->AsInteger()->width() == bit_width) ||
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(type->AsFloat() && type->AsFloat()->width() == bit_width)) {
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result.push_back(inst);
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}
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}
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return result;
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}
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std::vector<opt::Instruction*>
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FuzzerPassAddEquationInstructions::GetNumericalInstructions(
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const std::vector<opt::Instruction*>& instructions) const {
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std::vector<opt::Instruction*> result;
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for (auto* inst : instructions) {
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const auto* type = GetIRContext()->get_type_mgr()->GetType(inst->type_id());
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assert(type && "Instruction has invalid type");
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if (const auto* vector_type = type->AsVector()) {
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type = vector_type->element_type();
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}
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if (!type->AsInteger() && !type->AsFloat()) {
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// Only numerical scalars or vectors of numerical components are
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// supported.
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continue;
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}
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if (!IsBitWidthSupported(GetIRContext(), type->AsInteger()
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? type->AsInteger()->width()
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: type->AsFloat()->width())) {
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continue;
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}
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result.push_back(inst);
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}
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return result;
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}
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} // namespace fuzz
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} // namespace spvtools
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