AuroraMiddleware/asio
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The intel compiler doesn't provide the SSE2 intrinsics.

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This commit is contained in:
Christopher Kohlhoff 2014-06-29 20:38:38 +10:00
parent d5c93e2533
commit 70c158cbec
1 changed files with 6 additions and 6 deletions
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12
asio/include/asio/detail/gcc_x86_fenced_block.hpp
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@ -63,11 +63,11 @@ private:
static void lbarrier()
{
#if defined(__SSE2__)
# if (__GNUC__ >= 4)
# if (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
__builtin_ia32_lfence();
# else // (__GNUC__ >= 4)
# else // (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
__asm__ __volatile__ ("lfence" ::: "memory");
# endif // (__GNUC__ >= 4)
# endif // (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
#else // defined(__SSE2__)
barrier();
#endif // defined(__SSE2__)
@ -76,11 +76,11 @@ private:
static void sbarrier()
{
#if defined(__SSE2__)
# if (__GNUC__ >= 4)
# if (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
__builtin_ia32_sfence();
# else // (__GNUC__ >= 4)
# else // (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
__asm__ __volatile__ ("sfence" ::: "memory");
# endif // (__GNUC__ >= 4)
# endif // (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
#else // defined(__SSE2__)
barrier();
#endif // defined(__SSE2__)