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platform: fix unaligned 64-bit accesses on AArch32 (#699)
Ensures that Aarch32 Arm builds with an Armv8 compiler do not set BROTLI_64_BITS. This scenario is possible with ChromeOS builds, as they may use a toolchain with the target armv7-cros-gnueabi, but with -march=armv8. This will set __ARM_ARCH to 8 (defining BROTLI_TARGET_ARMV8), but will also set __ARM_32BIT_STATE and not __ARM_64BIT_STATE. Without this, illegal 64-bit non-word-aligned reads (LDRD) may be emitted. Also fix unaligned 64-bit reads on AArch32 - STRD was still possible to emit.
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@ -187,7 +187,14 @@ OR:
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#if (defined(__ARM_ARCH) && (__ARM_ARCH == 8)) || \
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defined(__aarch64__) || defined(__ARM64_ARCH_8__)
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#define BROTLI_TARGET_ARMV8
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#define BROTLI_TARGET_ARMV8_ANY
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#if defined(__ARM_32BIT_STATE)
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#define BROTLI_TARGET_ARMV8_32
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#elif defined(__ARM_64BIT_STATE)
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#define BROTLI_TARGET_ARMV8_64
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#endif
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#endif /* ARMv8 */
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#if defined(__i386) || defined(_M_IX86)
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@ -210,7 +217,7 @@ OR:
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#define BROTLI_64_BITS 1
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#elif defined(BROTLI_BUILD_32_BIT)
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#define BROTLI_64_BITS 0
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#elif defined(BROTLI_TARGET_X64) || defined(BROTLI_TARGET_ARMV8) || \
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#elif defined(BROTLI_TARGET_X64) || defined(BROTLI_TARGET_ARMV8_64) || \
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defined(BROTLI_TARGET_POWERPC64) || defined(BROTLI_TARGET_RISCV64)
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#define BROTLI_64_BITS 1
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#else
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@ -261,7 +268,7 @@ OR:
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#if defined(BROTLI_BUILD_PORTABLE)
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#define BROTLI_ALIGNED_READ (!!1)
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#elif defined(BROTLI_TARGET_X86) || defined(BROTLI_TARGET_X64) || \
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defined(BROTLI_TARGET_ARMV7) || defined(BROTLI_TARGET_ARMV8) || \
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defined(BROTLI_TARGET_ARMV7) || defined(BROTLI_TARGET_ARMV8_ANY) || \
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defined(BROTLI_TARGET_RISCV64)
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/* Allow unaligned read only for white-listed CPUs. */
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#define BROTLI_ALIGNED_READ (!!0)
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@ -306,15 +313,33 @@ static BROTLI_INLINE void BrotliUnalignedWrite64(void* p, uint64_t v) {
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}
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#else /* BROTLI_64_BITS */
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/* Avoid emitting LDRD / STRD, which require properly aligned address. */
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#if BROTLI_GNUC_HAS_ATTRIBUTE(aligned, 2, 7, 0)
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typedef __attribute__((aligned(1))) uint64_t unaligned_uint64_t;
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static BROTLI_INLINE uint64_t BrotliUnalignedRead64(const void* p) {
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const uint32_t* dwords = (const uint32_t*)p;
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return dwords[0] | ((uint64_t)dwords[1] << 32);
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return (uint64_t) ((unaligned_uint64_t*) p)[0];
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}
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static BROTLI_INLINE void BrotliUnalignedWrite64(void* p, uint64_t v) {
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uint32_t* dwords = (uint32_t *)p;
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dwords[0] = (uint32_t)v;
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dwords[1] = (uint32_t)(v >> 32);
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unaligned_uint64_t* dwords = (unaligned_uint64_t*) p;
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dwords[0] = (unaligned_uint64_t) v;
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}
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#else /* BROTLI_GNUC_HAS_ATTRIBUTE(aligned, 2, 7, 0) */
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/* Alternative way to avoid LDRD/STRD is use volatile pointers. See:
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* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka16346.html
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*/
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static BROTLI_INLINE uint64_t BrotliUnalignedRead64(const void* p) {
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return (uint64_t) *((volatile uint32_t*) p)
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| ((uint64_t) *((volatile uint32_t*) p+1) << 32);
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}
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static BROTLI_INLINE void BrotliUnalignedWrite64(void* p, uint64_t v) {
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*((volatile uint32_t*) p) = (uint32_t) v;
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*((volatile uint32_t*) p+1) = (uint32_t) (v >> 32);
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}
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#endif /* BROTLI_GNUC_HAS_ATTRIBUTE(aligned, 2, 7, 0) */
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#endif /* BROTLI_64_BITS */
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#endif /* BROTLI_ALIGNED_READ */
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@ -400,7 +425,7 @@ static BROTLI_INLINE void BROTLI_UNALIGNED_STORE64LE(void* p, uint64_t v) {
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#define BROTLI_IS_CONSTANT(x) (!!0)
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#endif
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#if defined(BROTLI_TARGET_ARMV7) || defined(BROTLI_TARGET_ARMV8)
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#if defined(BROTLI_TARGET_ARMV7) || defined(BROTLI_TARGET_ARMV8_ANY)
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#define BROTLI_HAS_UBFX (!!1)
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#else
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#define BROTLI_HAS_UBFX (!!0)
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@ -427,7 +452,7 @@ static BROTLI_INLINE void BrotliDump(const char* f, int l, const char* fn) {
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/* TODO: add appropriate icc/sunpro/arm/ibm/ti checks. */
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#if (BROTLI_GNUC_VERSION_CHECK(3, 0, 0) || defined(__llvm__)) && \
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!defined(BROTLI_BUILD_NO_RBIT)
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#if defined(BROTLI_TARGET_ARMV7) || defined(BROTLI_TARGET_ARMV8)
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#if defined(BROTLI_TARGET_ARMV7) || defined(BROTLI_TARGET_ARMV8_ANY)
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/* TODO: detect ARMv6T2 and enable this code for it. */
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static BROTLI_INLINE brotli_reg_t BrotliRBit(brotli_reg_t input) {
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brotli_reg_t output;
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