[base] Significant optimization of `ft_div64by32'
We shift as many bits as we can into the high register, perform 32-bit division with modulo there, then work through the remaining bits with long division. This optimization is especially noticeable for smaller dividends that barely use the high register. * src/base/ftcalc.c (ft_div64by32): Updated.
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ChangeLog
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ChangeLog
@ -1,3 +1,14 @@
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2014-10-02 Alexei Podtelezhnikov <apodtele@gmail.com>
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[base] Significant optimization of `ft_div64by32'
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We shift as many bits as we can into the high register, perform
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32-bit division with modulo there, then work through the remaining
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bits with long division. This optimization is especially noticeable
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for smaller dividends that barely use the high register.
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* src/base/ftcalc.c (ft_div64by32): Updated.
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2014-10-02 Dave Arnold <darnold@adobe.com>
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[cff] Fix Savannah bug #43271.
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@ -70,7 +81,7 @@
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Fix Savannah bug #43153.
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* src/psaux/psconv.c (PS_Conv_ToFixed): Add protection against
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overflow in `divider'.
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overflow in `divider'.
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2014-09-03 Alexei Podtelezhnikov <apodtele@gmail.com>
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@ -304,17 +304,24 @@
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FT_Int i;
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q = 0;
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r = hi;
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if ( r >= y )
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if ( hi >= y )
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return (FT_UInt32)0x7FFFFFFFL;
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i = 32;
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/* We shift as many bits as we can into the high register, perform */
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/* 32-bit division with modulo there, then work through the remaining */
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/* bits with long division. This optimization is especially noticeable */
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/* for smaller dividends that barely use the high register. */
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i = 31 - FT_MSB( hi );
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r = ( hi << i ) | ( lo >> ( 32 - i ) ); lo <<= i; /* left 64-bit shift */
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q = r / y;
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r -= q * y; /* remainder */
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i = 32 - i; /* bits remaining in low register */
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do
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{
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q <<= 1;
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r = ( r << 1 ) | ( lo >> 31 ); lo <<= 1; /* left 64-bit shift */
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r = ( r << 1 ) | ( lo >> 31 ); lo <<= 1;
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if ( r >= y )
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{
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