2022-11-09 01:38:38 +00:00
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/* {wcs|wcp|str|stp}cpy with 256/512-bit EVEX instructions.
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2024-01-01 18:12:26 +00:00
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Copyright (C) 2021-2024 Free Software Foundation, Inc.
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2021-03-05 14:36:50 +00:00
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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2022-07-13 23:33:01 +00:00
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#include <isa-level.h>
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#if ISA_SHOULD_BUILD (4)
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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/* Use evex-masked stores for small sizes. Turned off at the
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moment. */
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# define USE_EVEX_MASKED_STORE 0
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/* Use movsb in page cross case to save code size. */
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# define USE_MOVSB_IN_PAGE_CROSS 1
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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# include <sysdep.h>
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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# ifndef VEC_SIZE
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# include "x86-evex256-vecs.h"
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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# ifndef STRCPY
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# define STRCPY __strcpy_evex
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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# ifdef USE_AS_WCSCPY
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# define VMOVU_MASK vmovdqu32
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# define VPMIN vpminud
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# define VPTESTN vptestnmd
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# define VPTEST vptestmd
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# define VPCMPEQ vpcmpeqd
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# define CHAR_SIZE 4
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2021-03-05 14:36:50 +00:00
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2024-11-08 19:18:17 +00:00
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# define REP_MOVS rep movsl
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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# define USE_WIDE_CHAR
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# else
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# define VMOVU_MASK vmovdqu8
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# define VPMIN vpminub
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# define VPTESTN vptestnmb
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# define VPTEST vptestmb
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# define VPCMPEQ vpcmpeqb
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# define CHAR_SIZE 1
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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# define REP_MOVS rep movsb
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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# include "reg-macros.h"
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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# ifdef USE_AS_STPCPY
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# define END_REG rax
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2021-03-05 14:36:50 +00:00
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# else
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2022-11-09 01:38:38 +00:00
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# define END_REG rdi, %rdx, CHAR_SIZE
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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# ifdef USE_AS_STRCAT
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# define PAGE_ALIGN_REG edx
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# define PAGE_ALIGN_REG_64 rdx
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2021-03-05 14:36:50 +00:00
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# else
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2022-11-09 01:38:38 +00:00
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# define PAGE_ALIGN_REG eax
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# define PAGE_ALIGN_REG_64 rax
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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# define VZERO VMM(7)
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# define VZERO_128 VMM_128(7)
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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# define PAGE_SIZE 4096
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# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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.section SECTION(.text), "ax", @progbits
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ENTRY(STRCPY)
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# ifdef USE_AS_STRCAT
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movq %rdi, %rax
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# include "strcat-strlen-evex.h.S"
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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movl %esi, %PAGE_ALIGN_REG
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andl $(PAGE_SIZE - 1), %PAGE_ALIGN_REG
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cmpl $(PAGE_SIZE - VEC_SIZE), %PAGE_ALIGN_REG
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ja L(page_cross)
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L(page_cross_continue):
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VMOVU (%rsi), %VMM(0)
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# if !defined USE_AS_STPCPY && !defined USE_AS_STRCAT
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movq %rdi, %rax
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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/* Two short string implementations. One with traditional
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branching approach and one with masked instructions (which
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have potential for dramatically bad perf if dst splits a
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page and is not in the TLB). */
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# if USE_EVEX_MASKED_STORE
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VPTEST %VMM(0), %VMM(0), %k0
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KMOV %k0, %VRCX
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# ifdef USE_AS_WCSCPY
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subl $((1 << CHAR_PER_VEC)- 1), %VRCX
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# else
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inc %VRCX
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# endif
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jz L(more_1x_vec)
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KMOV %VRCX, %k1
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KXOR %k0, %k1, %k1
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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VMOVU_MASK %VMM(0), (%rdi){%k1}
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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# ifdef USE_AS_STPCPY
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bsf %VRCX, %VRCX
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leaq (%rdi, %rcx, CHAR_SIZE), %rax
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# endif
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ret
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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# else
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VPTESTN %VMM(0), %VMM(0), %k0
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KMOV %k0, %VRCX
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test %VRCX, %VRCX
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jz L(more_1x_vec)
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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xorl %edx, %edx
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bsf %VRCX, %VRDX
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# ifdef USE_AS_STPCPY
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leaq (%rdi, %rdx, CHAR_SIZE), %rax
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# endif
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/* Use mask bits in rcx to detect which copy we need. If the low
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mask is zero then there must be a bit set in the upper half.
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I.e if rcx != 0 and ecx == 0, then match must be upper 32
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bits so we use L(copy_32_63). */
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# if VEC_SIZE == 64
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# ifdef USE_AS_WCSCPY
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testb %cl, %cl
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# else
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testl %ecx, %ecx
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# endif
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jz L(copy_32_63)
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# endif
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# ifdef USE_AS_WCSCPY
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testb $0xf, %cl
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2021-03-05 14:36:50 +00:00
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# else
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2022-11-09 01:38:38 +00:00
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testw %cx, %cx
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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jz L(copy_16_31)
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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# ifdef USE_AS_WCSCPY
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testb $0x3, %cl
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2021-03-05 14:36:50 +00:00
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# else
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2022-11-09 01:38:38 +00:00
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testb %cl, %cl
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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jz L(copy_8_15)
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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# ifdef USE_AS_WCSCPY
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vmovd %VMM_128(0), (%rdi)
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/* No need to copy, we know its zero. */
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movl $0, (%END_REG)
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2021-03-05 14:36:50 +00:00
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ret
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2022-11-09 01:38:38 +00:00
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# else
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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testb $0x7, %cl
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jz L(copy_4_7)
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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test %edx, %edx
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jz L(set_null_term)
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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/* NB: make this `vmovw` if support for AVX512-FP16 is added.
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*/
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vmovd %VMM_128(0), %esi
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movw %si, (%rdi)
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.p2align 4,, 1
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L(set_null_term):
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/* No need to copy, we know its zero. */
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movb $0, (%END_REG)
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ret
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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# if VEC_SIZE == 64
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.p2align 4,, 6
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L(copy_32_63):
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VMOVU -(32 - CHAR_SIZE)(%rsi, %rdx, CHAR_SIZE), %VMM_256(1)
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VMOVU %VMM_256(0), (%rdi)
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VMOVU %VMM_256(1), -(32 - CHAR_SIZE)(%END_REG)
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ret
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# endif
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.p2align 4,, 6
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L(copy_16_31):
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/* Use xmm1 explicitly here as it won't require a `vzeroupper`
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and will save code size. */
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vmovdqu -(16 - CHAR_SIZE)(%rsi, %rdx, CHAR_SIZE), %xmm1
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VMOVU %VMM_128(0), (%rdi)
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vmovdqu %xmm1, -(16 - CHAR_SIZE)(%END_REG)
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ret
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.p2align 4,, 8
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L(copy_8_15):
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# ifdef USE_AS_WCSCPY
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movl -(8 - CHAR_SIZE)(%rsi, %rdx, CHAR_SIZE), %ecx
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# else
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movq -(8 - CHAR_SIZE)(%rsi, %rdx, CHAR_SIZE), %rcx
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# endif
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vmovq %VMM_128(0), (%rdi)
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movq %rcx, -(8 - CHAR_SIZE)(%END_REG)
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ret
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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# ifndef USE_AS_WCSCPY
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.p2align 4,, 12
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L(copy_4_7):
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movl -(4 - CHAR_SIZE)(%rsi, %rdx, CHAR_SIZE), %ecx
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vmovd %VMM_128(0), (%rdi)
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movl %ecx, -(4 - CHAR_SIZE)(%END_REG)
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ret
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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.p2align 4,, 8
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L(more_1x_vec):
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# if defined USE_AS_STPCPY || defined USE_AS_STRCAT
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VMOVU %VMM(0), (%rdi)
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2021-03-05 14:36:50 +00:00
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# endif
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2022-11-09 01:38:38 +00:00
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subq %rsi, %rdi
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andq $-(VEC_SIZE), %rsi
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addq %rsi, %rdi
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VMOVA (VEC_SIZE * 1)(%rsi), %VMM(1)
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2021-03-05 14:36:50 +00:00
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2022-11-09 01:38:38 +00:00
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/* Ideally we store after moves to minimize impact of potential
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false-dependencies. */
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# if !defined USE_AS_STPCPY && !defined USE_AS_STRCAT
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VMOVU %VMM(0), (%rax)
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# endif
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VPTESTN %VMM(1), %VMM(1), %k0
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KMOV %k0, %VRCX
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test %VRCX, %VRCX
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jnz L(ret_vec_x1)
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VMOVA (VEC_SIZE * 2)(%rsi), %VMM(2)
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VMOVU %VMM(1), VEC_SIZE(%rdi)
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VPTESTN %VMM(2), %VMM(2), %k0
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KMOV %k0, %VRCX
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test %VRCX, %VRCX
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jnz L(ret_vec_x2)
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VMOVA (VEC_SIZE * 3)(%rsi), %VMM(3)
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VMOVU %VMM(2), (VEC_SIZE * 2)(%rdi)
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VPTESTN %VMM(3), %VMM(3), %k0
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KMOV %k0, %VRDX
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test %VRDX, %VRDX
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jnz L(ret_vec_x3)
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VMOVA (VEC_SIZE * 4)(%rsi), %VMM(4)
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VMOVU %VMM(3), (VEC_SIZE * 3)(%rdi)
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VPTESTN %VMM(4), %VMM(4), %k0
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KMOV %k0, %VRCX
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test %VRCX, %VRCX
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jnz L(ret_vec_x4)
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VMOVU %VMM(4), (VEC_SIZE * 4)(%rdi)
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/* Align for 4x loop. */
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subq %rsi, %rdi
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/* + VEC_SIZE * 5 because we never added the original VEC_SIZE
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we covered before aligning. */
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subq $-(VEC_SIZE * 5), %rsi
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andq $-(VEC_SIZE * 4), %rsi
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/* Load first half of the loop before entry. */
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VMOVA (VEC_SIZE * 0 + 0)(%rsi), %VMM(0)
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VMOVA (VEC_SIZE * 1 + 0)(%rsi), %VMM(1)
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VMOVA (VEC_SIZE * 2 + 0)(%rsi), %VMM(2)
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VMOVA (VEC_SIZE * 3 + 0)(%rsi), %VMM(3)
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VPMIN %VMM(0), %VMM(1), %VMM(4)
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VPMIN %VMM(2), %VMM(3), %VMM(6)
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VPTESTN %VMM(4), %VMM(4), %k2
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VPTESTN %VMM(6), %VMM(6), %k4
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KORTEST %k2, %k4
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jnz L(loop_4x_done)
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.p2align 4,, 11
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L(loop_4x_vec):
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VMOVU %VMM(0), (VEC_SIZE * 0 + 0)(%rdi, %rsi)
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VMOVU %VMM(1), (VEC_SIZE * 1 + 0)(%rdi, %rsi)
|
|
|
|
VMOVU %VMM(2), (VEC_SIZE * 2 + 0)(%rdi, %rsi)
|
|
|
|
VMOVU %VMM(3), (VEC_SIZE * 3 + 0)(%rdi, %rsi)
|
|
|
|
|
|
|
|
subq $(VEC_SIZE * -4), %rsi
|
|
|
|
|
|
|
|
VMOVA (VEC_SIZE * 0 + 0)(%rsi), %VMM(0)
|
|
|
|
VMOVA (VEC_SIZE * 1 + 0)(%rsi), %VMM(1)
|
|
|
|
VMOVA (VEC_SIZE * 2 + 0)(%rsi), %VMM(2)
|
|
|
|
VMOVA (VEC_SIZE * 3 + 0)(%rsi), %VMM(3)
|
|
|
|
|
|
|
|
|
|
|
|
VPMIN %VMM(0), %VMM(1), %VMM(4)
|
|
|
|
VPMIN %VMM(2), %VMM(3), %VMM(6)
|
|
|
|
VPTESTN %VMM(4), %VMM(4), %k2
|
|
|
|
VPTESTN %VMM(6), %VMM(6), %k4
|
|
|
|
KORTEST %k2, %k4
|
|
|
|
jz L(loop_4x_vec)
|
|
|
|
|
|
|
|
L(loop_4x_done):
|
|
|
|
VPTESTN %VMM(0), %VMM(0), %k0
|
|
|
|
KMOV %k0, %VRCX
|
|
|
|
/* Restore rdi (%rdi). */
|
|
|
|
addq %rsi, %rdi
|
|
|
|
test %VRCX, %VRCX
|
|
|
|
jnz L(ret_vec_x0_end)
|
|
|
|
VMOVU %VMM(0), (VEC_SIZE * 0 + 0)(%rdi)
|
|
|
|
|
|
|
|
KMOV %k2, %VRCX
|
|
|
|
test %VRCX, %VRCX
|
|
|
|
jnz L(ret_vec_x1)
|
|
|
|
VMOVU %VMM(1), (VEC_SIZE * 1 + 0)(%rdi)
|
|
|
|
|
|
|
|
VPTESTN %VMM(2), %VMM(2), %k0
|
|
|
|
KMOV %k0, %VRCX
|
|
|
|
test %VRCX, %VRCX
|
|
|
|
jnz L(ret_vec_x2)
|
|
|
|
VMOVU %VMM(2), (VEC_SIZE * 2 + 0)(%rdi)
|
|
|
|
/* Place L(ret_vec_x4) here to save code size. We get a
|
|
|
|
meaningfuly benefit doing this for stpcpy. */
|
|
|
|
KMOV %k4, %VRDX
|
|
|
|
L(ret_vec_x3):
|
|
|
|
bsf %VRDX, %VRDX
|
|
|
|
VMOVU ((VEC_SIZE * 3)-(VEC_SIZE - CHAR_SIZE))(%rsi, %rdx, CHAR_SIZE), %VMM(0)
|
|
|
|
VMOVU %VMM(0), ((VEC_SIZE * 3 + 0)-(VEC_SIZE - CHAR_SIZE))(%rdi, %rdx, CHAR_SIZE)
|
2021-03-05 14:36:50 +00:00
|
|
|
# ifdef USE_AS_STPCPY
|
2022-11-09 01:38:38 +00:00
|
|
|
leaq (VEC_SIZE * 3 + 0)(%rdi, %rdx, CHAR_SIZE), %rax
|
2021-03-05 14:36:50 +00:00
|
|
|
# endif
|
2022-11-09 01:38:38 +00:00
|
|
|
L(return_end):
|
2021-03-05 14:36:50 +00:00
|
|
|
ret
|
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
.p2align 4,, 6
|
|
|
|
L(ret_vec_x0_end):
|
|
|
|
bsf %VRCX, %VRCX
|
2021-03-05 14:36:50 +00:00
|
|
|
# ifdef USE_AS_STPCPY
|
2022-11-09 01:38:38 +00:00
|
|
|
leaq (%rdi, %rcx, CHAR_SIZE), %rax
|
2021-03-05 14:36:50 +00:00
|
|
|
# endif
|
2022-11-09 01:38:38 +00:00
|
|
|
inc %VRCX
|
|
|
|
VMOVU (-(VEC_SIZE))(%rsi, %rcx, CHAR_SIZE), %VMM(0)
|
|
|
|
VMOVU %VMM(0), (-(VEC_SIZE))(%rdi, %rcx, CHAR_SIZE)
|
2021-03-05 14:36:50 +00:00
|
|
|
ret
|
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
.p2align 4,, 8
|
|
|
|
L(ret_vec_x1):
|
|
|
|
bsf %VRCX, %VRCX
|
|
|
|
VMOVU (VEC_SIZE -(VEC_SIZE - CHAR_SIZE))(%rsi, %rcx, CHAR_SIZE), %VMM(0)
|
|
|
|
VMOVU %VMM(0), (VEC_SIZE -(VEC_SIZE - CHAR_SIZE))(%rdi, %rcx, CHAR_SIZE)
|
2021-03-05 14:36:50 +00:00
|
|
|
# ifdef USE_AS_STPCPY
|
2022-11-09 01:38:38 +00:00
|
|
|
leaq VEC_SIZE(%rdi, %rcx, CHAR_SIZE), %rax
|
2021-03-05 14:36:50 +00:00
|
|
|
# endif
|
|
|
|
ret
|
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
.p2align 4,, 4
|
|
|
|
L(ret_vec_x2):
|
|
|
|
bsf %VRCX, %VRCX
|
|
|
|
VMOVU ((VEC_SIZE * 2)-(VEC_SIZE - CHAR_SIZE))(%rsi, %rcx, CHAR_SIZE), %VMM(0)
|
|
|
|
VMOVU %VMM(0), ((VEC_SIZE * 2)-(VEC_SIZE - CHAR_SIZE))(%rdi, %rcx, CHAR_SIZE)
|
2021-03-05 14:36:50 +00:00
|
|
|
# ifdef USE_AS_STPCPY
|
2022-11-09 01:38:38 +00:00
|
|
|
leaq (VEC_SIZE * 2)(%rdi, %rcx, CHAR_SIZE), %rax
|
2021-03-05 14:36:50 +00:00
|
|
|
# endif
|
|
|
|
ret
|
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
/* ret_vec_x3 reuses return code after the loop. */
|
|
|
|
.p2align 4,, 6
|
|
|
|
L(ret_vec_x4):
|
|
|
|
bsf %VRCX, %VRCX
|
|
|
|
VMOVU ((VEC_SIZE * 4)-(VEC_SIZE - CHAR_SIZE))(%rsi, %rcx, CHAR_SIZE), %VMM(0)
|
|
|
|
VMOVU %VMM(0), ((VEC_SIZE * 4)-(VEC_SIZE - CHAR_SIZE))(%rdi, %rcx, CHAR_SIZE)
|
2021-03-05 14:36:50 +00:00
|
|
|
# ifdef USE_AS_STPCPY
|
2022-11-09 01:38:38 +00:00
|
|
|
leaq (VEC_SIZE * 4)(%rdi, %rcx, CHAR_SIZE), %rax
|
2021-03-05 14:36:50 +00:00
|
|
|
# endif
|
|
|
|
ret
|
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
|
|
|
|
.p2align 4,, 4
|
|
|
|
L(page_cross):
|
|
|
|
# ifndef USE_AS_STRCAT
|
|
|
|
vpxorq %VZERO_128, %VZERO_128, %VZERO_128
|
2021-03-05 14:36:50 +00:00
|
|
|
# endif
|
2022-11-09 01:38:38 +00:00
|
|
|
movq %rsi, %rcx
|
|
|
|
andq $(VEC_SIZE * -1), %rcx
|
|
|
|
|
|
|
|
VPCMPEQ (%rcx), %VZERO, %k0
|
|
|
|
KMOV %k0, %VRCX
|
|
|
|
# ifdef USE_AS_WCSCPY
|
|
|
|
andl $(VEC_SIZE - 1), %PAGE_ALIGN_REG
|
|
|
|
shrl $2, %PAGE_ALIGN_REG
|
2021-03-05 14:36:50 +00:00
|
|
|
# endif
|
2022-11-09 01:38:38 +00:00
|
|
|
shrx %VGPR(PAGE_ALIGN_REG_64), %VRCX, %VRCX
|
2021-03-05 14:36:50 +00:00
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
# if USE_MOVSB_IN_PAGE_CROSS
|
|
|
|
/* Optimizing more aggressively for space as this is very cold
|
|
|
|
code. This saves 2x cache lines. */
|
2021-03-05 14:36:50 +00:00
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
/* This adds once to the later result which will get correct
|
|
|
|
copy bounds. NB: this can never zero-out a non-zero RCX as
|
|
|
|
to be in the page cross case rsi cannot be aligned and we
|
|
|
|
already right-shift rcx by the misalignment. */
|
|
|
|
shl %VRCX
|
|
|
|
jz L(page_cross_continue)
|
|
|
|
# if !defined USE_AS_STPCPY && !defined USE_AS_STRCAT
|
|
|
|
movq %rdi, %rax
|
2021-03-05 14:36:50 +00:00
|
|
|
# endif
|
2022-11-09 01:38:38 +00:00
|
|
|
bsf %VRCX, %VRCX
|
|
|
|
REP_MOVS
|
2021-03-05 14:36:50 +00:00
|
|
|
|
|
|
|
# ifdef USE_AS_STPCPY
|
2022-11-09 01:38:38 +00:00
|
|
|
leaq -CHAR_SIZE(%rdi), %rax
|
2021-03-05 14:36:50 +00:00
|
|
|
# endif
|
|
|
|
ret
|
|
|
|
|
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
# else
|
|
|
|
/* Check if we found zero-char before end of page. */
|
|
|
|
test %VRCX, %VRCX
|
|
|
|
jz L(page_cross_continue)
|
2021-03-05 14:36:50 +00:00
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
/* Traditional copy case, essentially same as used in non-page-
|
|
|
|
cross case but since we can't reuse VMM(0) we need twice as
|
|
|
|
many loads from rsi. */
|
2021-03-05 14:36:50 +00:00
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
# ifndef USE_AS_STRCAT
|
|
|
|
xorl %edx, %edx
|
2021-03-05 14:36:50 +00:00
|
|
|
# endif
|
2022-11-09 01:38:38 +00:00
|
|
|
/* Dependency on rdi must already have been satisfied. */
|
|
|
|
bsf %VRCX, %VRDX
|
2021-03-05 14:36:50 +00:00
|
|
|
# ifdef USE_AS_STPCPY
|
2022-11-09 01:38:38 +00:00
|
|
|
leaq (%rdi, %rdx, CHAR_SIZE), %rax
|
|
|
|
# elif !defined USE_AS_STRCAT
|
|
|
|
movq %rdi, %rax
|
2021-03-05 14:36:50 +00:00
|
|
|
# endif
|
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
# if VEC_SIZE == 64
|
|
|
|
# ifdef USE_AS_WCSCPY
|
|
|
|
testb %cl, %cl
|
|
|
|
# else
|
|
|
|
test %ecx, %ecx
|
|
|
|
# endif
|
|
|
|
jz L(page_cross_copy_32_63)
|
2021-03-05 14:36:50 +00:00
|
|
|
# endif
|
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
# ifdef USE_AS_WCSCPY
|
|
|
|
testb $0xf, %cl
|
|
|
|
# else
|
|
|
|
testw %cx, %cx
|
|
|
|
# endif
|
|
|
|
jz L(page_cross_copy_16_31)
|
2021-03-05 14:36:50 +00:00
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
# ifdef USE_AS_WCSCPY
|
|
|
|
testb $0x3, %cl
|
|
|
|
# else
|
|
|
|
testb %cl, %cl
|
|
|
|
# endif
|
|
|
|
jz L(page_cross_copy_8_15)
|
2021-03-05 14:36:50 +00:00
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
# ifdef USE_AS_WCSCPY
|
|
|
|
movl (%rsi), %esi
|
|
|
|
movl %esi, (%rdi)
|
|
|
|
movl $0, (%END_REG)
|
2021-03-05 14:36:50 +00:00
|
|
|
ret
|
2022-11-09 01:38:38 +00:00
|
|
|
# else
|
2021-03-05 14:36:50 +00:00
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
testb $0x7, %cl
|
|
|
|
jz L(page_cross_copy_4_7)
|
2021-03-05 14:36:50 +00:00
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
test %edx, %edx
|
|
|
|
jz L(page_cross_set_null_term)
|
|
|
|
movzwl (%rsi), %ecx
|
|
|
|
movw %cx, (%rdi)
|
|
|
|
L(page_cross_set_null_term):
|
|
|
|
movb $0, (%END_REG)
|
2021-03-05 14:36:50 +00:00
|
|
|
ret
|
|
|
|
|
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
.p2align 4,, 4
|
|
|
|
L(page_cross_copy_4_7):
|
|
|
|
movl (%rsi), %ecx
|
|
|
|
movl -(4 - CHAR_SIZE)(%rsi, %rdx, CHAR_SIZE), %esi
|
|
|
|
movl %ecx, (%rdi)
|
|
|
|
movl %esi, -(4 - CHAR_SIZE)(%END_REG)
|
2021-03-05 14:36:50 +00:00
|
|
|
ret
|
|
|
|
# endif
|
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
# if VEC_SIZE == 64
|
|
|
|
.p2align 4,, 4
|
|
|
|
L(page_cross_copy_32_63):
|
|
|
|
VMOVU (%rsi), %VMM_256(0)
|
|
|
|
VMOVU -(32 - CHAR_SIZE)(%rsi, %rdx, CHAR_SIZE), %VMM_256(1)
|
|
|
|
VMOVU %VMM_256(0), (%rdi)
|
|
|
|
VMOVU %VMM_256(1), -(32 - CHAR_SIZE)(%END_REG)
|
2021-03-05 14:36:50 +00:00
|
|
|
ret
|
|
|
|
# endif
|
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
.p2align 4,, 4
|
|
|
|
L(page_cross_copy_16_31):
|
|
|
|
vmovdqu (%rsi), %xmm0
|
|
|
|
vmovdqu -(16 - CHAR_SIZE)(%rsi, %rdx, CHAR_SIZE), %xmm1
|
|
|
|
vmovdqu %xmm0, (%rdi)
|
|
|
|
vmovdqu %xmm1, -(16 - CHAR_SIZE)(%END_REG)
|
2021-03-05 14:36:50 +00:00
|
|
|
ret
|
|
|
|
|
2022-11-09 01:38:38 +00:00
|
|
|
.p2align 4,, 4
|
|
|
|
L(page_cross_copy_8_15):
|
|
|
|
movq (%rsi), %rcx
|
|
|
|
movq -(8 - CHAR_SIZE)(%rsi, %rdx, CHAR_SIZE), %rsi
|
|
|
|
movq %rcx, (%rdi)
|
|
|
|
movq %rsi, -(8 - CHAR_SIZE)(%END_REG)
|
2021-03-05 14:36:50 +00:00
|
|
|
ret
|
|
|
|
# endif
|
2022-11-09 01:38:38 +00:00
|
|
|
END(STRCPY)
|
2021-03-05 14:36:50 +00:00
|
|
|
#endif
|