2013-10-04 15:55:15 +00:00
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/* getcontext/setcontext/makecontext support for e500 high parts of registers.
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2019-01-01 00:11:28 +00:00
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Copyright (C) 2006-2019 Free Software Foundation, Inc.
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2013-10-04 15:55:15 +00:00
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef _CONTEXT_E500_H
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#define _CONTEXT_E500_H 1
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#if defined __SPE__ || (defined __NO_FPRS__ && !defined _SOFT_FLOAT)
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# define __CONTEXT_ENABLE_E500 1
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/* We follow the kernel's layout, which saves the high parts of the
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SPE registers in the vregs area, immediately followed by the ACC
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value (call-clobbered, not handled here) and the SPEFSCR value. */
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.macro getcontext_e500
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la r10,(_UC_VREGS)(r3)
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evstwwe r0,(0*4)(r10)
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evstwwe r1,(1*4)(r10)
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evstwwe r2,(2*4)(r10)
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evstwwe r3,(3*4)(r10)
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evstwwe r4,(4*4)(r10)
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evstwwe r5,(5*4)(r10)
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evstwwe r6,(6*4)(r10)
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evstwwe r7,(7*4)(r10)
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evstwwe r8,(8*4)(r10)
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evstwwe r9,(9*4)(r10)
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evstwwe r10,(10*4)(r10)
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evstwwe r11,(11*4)(r10)
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evstwwe r12,(12*4)(r10)
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evstwwe r13,(13*4)(r10)
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evstwwe r14,(14*4)(r10)
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evstwwe r15,(15*4)(r10)
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evstwwe r16,(16*4)(r10)
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evstwwe r17,(17*4)(r10)
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evstwwe r18,(18*4)(r10)
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evstwwe r19,(19*4)(r10)
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evstwwe r20,(20*4)(r10)
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evstwwe r21,(21*4)(r10)
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evstwwe r22,(22*4)(r10)
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evstwwe r23,(23*4)(r10)
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evstwwe r24,(24*4)(r10)
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evstwwe r25,(25*4)(r10)
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evstwwe r26,(26*4)(r10)
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evstwwe r27,(27*4)(r10)
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evstwwe r28,(28*4)(r10)
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evstwwe r29,(29*4)(r10)
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evstwwe r30,(30*4)(r10)
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evstwwe r31,(31*4)(r10)
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mfspefscr r9
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stw r9,(34*4)(r10)
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.endm
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.macro setcontext_e500
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lwz r3,_UC_VREGS+(0*4)(r31)
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evmergelo r0,r3,r0
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lwz r3,_UC_VREGS+(1*4)(r31)
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evmergelo r1,r3,r1
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lwz r3,_UC_VREGS+(2*4)(r31)
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evmergelo r2,r3,r2
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lwz r3,_UC_VREGS+(1*4)(r31)
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evmergelo r1,r3,r1
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lwz r3,_UC_VREGS+(2*4)(r31)
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evmergelo r2,r3,r2
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lwz r3,_UC_VREGS+(3*4)(r31)
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evmergelo r3,r3,r3
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lwz r3,_UC_VREGS+(4*4)(r31)
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evmergelo r4,r3,r4
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lwz r3,_UC_VREGS+(5*4)(r31)
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evmergelo r5,r3,r5
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lwz r3,_UC_VREGS+(6*4)(r31)
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evmergelo r6,r3,r6
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lwz r3,_UC_VREGS+(7*4)(r31)
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evmergelo r7,r3,r7
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lwz r3,_UC_VREGS+(8*4)(r31)
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evmergelo r8,r3,r8
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lwz r3,_UC_VREGS+(9*4)(r31)
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evmergelo r9,r3,r9
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lwz r3,_UC_VREGS+(10*4)(r31)
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evmergelo r10,r3,r10
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lwz r3,_UC_VREGS+(11*4)(r31)
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evmergelo r11,r3,r11
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lwz r3,_UC_VREGS+(12*4)(r31)
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evmergelo r12,r3,r12
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lwz r3,_UC_VREGS+(13*4)(r31)
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evmergelo r13,r3,r13
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lwz r3,_UC_VREGS+(14*4)(r31)
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evmergelo r14,r3,r14
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lwz r3,_UC_VREGS+(15*4)(r31)
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evmergelo r15,r3,r15
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lwz r3,_UC_VREGS+(16*4)(r31)
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evmergelo r16,r3,r16
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lwz r3,_UC_VREGS+(17*4)(r31)
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evmergelo r17,r3,r17
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lwz r3,_UC_VREGS+(18*4)(r31)
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evmergelo r18,r3,r18
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lwz r3,_UC_VREGS+(19*4)(r31)
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evmergelo r19,r3,r19
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lwz r3,_UC_VREGS+(20*4)(r31)
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evmergelo r20,r3,r20
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lwz r3,_UC_VREGS+(21*4)(r31)
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evmergelo r21,r3,r21
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lwz r3,_UC_VREGS+(22*4)(r31)
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evmergelo r22,r3,r22
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lwz r3,_UC_VREGS+(23*4)(r31)
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evmergelo r23,r3,r23
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lwz r3,_UC_VREGS+(24*4)(r31)
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evmergelo r24,r3,r24
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lwz r3,_UC_VREGS+(25*4)(r31)
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evmergelo r25,r3,r25
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lwz r3,_UC_VREGS+(26*4)(r31)
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evmergelo r26,r3,r26
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lwz r3,_UC_VREGS+(27*4)(r31)
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evmergelo r27,r3,r27
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lwz r3,_UC_VREGS+(28*4)(r31)
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evmergelo r28,r3,r28
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lwz r3,_UC_VREGS+(29*4)(r31)
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evmergelo r29,r3,r29
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lwz r3,_UC_VREGS+(30*4)(r31)
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evmergelo r30,r3,r30
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lwz r3,_UC_VREGS+(31*4)(r31)
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evmergelo r31,r3,r31
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lwz r3,_UC_VREGS+(34*4)(r31)
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mtspefscr r3
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.endm
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#else
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# undef __CONTEXT_ENABLE_E500
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#endif
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#endif /* context-e500.h */
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