1995-10-16 01:18:40 +00:00
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; HP-PA-1.1 __mpn_mul_1 -- Multiply a limb vector with a limb and store
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; the result in a second limb vector.
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; Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc.
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; This file is part of the GNU MP Library.
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; The GNU MP Library is free software; you can redistribute it and/or modify
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; it under the terms of the GNU Library General Public License as published by
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; the Free Software Foundation; either version 2 of the License, or (at your
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; option) any later version.
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; The GNU MP Library is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Library General Public
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; License for more details.
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; You should have received a copy of the GNU Library General Public License
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; along with the GNU MP Library; see the file COPYING.LIB. If not, write to
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1996-05-07 21:04:45 +00:00
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; the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
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; MA 02111-1307, USA.
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1995-10-16 01:18:40 +00:00
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; INPUT PARAMETERS
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; res_ptr r26
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; s1_ptr r25
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; size r24
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; s2_limb r23
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; This runs at 9 cycles/limb on a PA7000. With the used instructions, it can
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; not become faster due to data cache contention after a store. On the
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; PA7100 it runs at 7 cycles/limb, and that can not be improved either, since
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; only the xmpyu does not need the integer pipeline, so the only dual-issue
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; we will get are addc+xmpyu. Unrolling would not help either CPU.
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; We could use fldds to read two limbs at a time from the S1 array, and that
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; could bring down the times to 8.5 and 6.5 cycles/limb for the PA7000 and
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; PA7100, respectively. We don't do that since it does not seem worth the
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; (alignment) troubles...
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; At least the PA7100 is rumored to be able to deal with cache-misses
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; without stalling instruction issue. If this is true, and the cache is
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; actually also lockup-free, we should use a deeper software pipeline, and
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; load from S1 very early! (The loads and stores to -12(sp) will surely be
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; in the cache.)
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.code
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.export __mpn_mul_1
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__mpn_mul_1
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.proc
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.callinfo frame=64,no_calls
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.entry
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ldo 64(%r30),%r30
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fldws,ma 4(%r25),%fr5
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stw %r23,-16(%r30) ; move s2_limb ...
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addib,= -1,%r24,L$just_one_limb
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fldws -16(%r30),%fr4 ; ... into fr4
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add %r0,%r0,%r0 ; clear carry
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xmpyu %fr4,%fr5,%fr6
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fldws,ma 4(%r25),%fr7
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fstds %fr6,-16(%r30)
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xmpyu %fr4,%fr7,%fr8
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ldw -12(%r30),%r19 ; least significant limb in product
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ldw -16(%r30),%r28
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fstds %fr8,-16(%r30)
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addib,= -1,%r24,L$end
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ldw -12(%r30),%r1
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; Main loop
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L$loop fldws,ma 4(%r25),%fr5
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stws,ma %r19,4(%r26)
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addc %r28,%r1,%r19
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xmpyu %fr4,%fr5,%fr6
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ldw -16(%r30),%r28
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fstds %fr6,-16(%r30)
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addib,<> -1,%r24,L$loop
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ldw -12(%r30),%r1
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L$end stws,ma %r19,4(%r26)
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addc %r28,%r1,%r19
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ldw -16(%r30),%r28
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stws,ma %r19,4(%r26)
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addc %r0,%r28,%r28
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bv 0(%r2)
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ldo -64(%r30),%r30
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L$just_one_limb
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xmpyu %fr4,%fr5,%fr6
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fstds %fr6,-16(%r30)
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ldw -16(%r30),%r28
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ldo -64(%r30),%r30
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bv 0(%r2)
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fstws %fr6R,0(%r26)
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.exit
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.procend
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