glibc/sysdeps/or1k/fpu/fsetexcptflg.c

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or1k: Add hard float support This patch adds hardware floating point support to OpenRISC. Hardware floating point toolchain builds are enabled by passing the machine specific argument -mhard-float to gcc via CFLAGS. With this enabled GCC generates floating point instructions for single-precision operations and exports __or1k_hard_float__. There are 2 main parts to this patch. - Implement fenv functions to update the FPCSR flags keeping it in sync with sfp (software floating point). - Update machine context functions to store and restore the FPCSR state. *On mcontext_t ABI* This patch adds __fpcsr to mcontext_t. This is an ABI change, but also an ABI fix. The Linux kernel has always defined padding in mcontext_t that space was missing from the glibc ABI. In Linux this unused space has now been re-purposed for storing the FPCSR. This patch brings OpenRISC glibc in line with the Linux kernel and other libc implementation (musl). Compatibility getcontext, setcontext, etc symbols have been added to allow for binaries expecting the old ABI to continue to work. *Hard float ABI* The calling conventions and types do not change with OpenRISC hard-float so glibc hard-float builds continue to use dynamic linker /lib/ld-linux-or1k.so.1. *Testing* I have tested this patch both with hard-float and soft-float builds and the test results look fine to me. Results are as follows: Hard Float # failures FAIL: elf/tst-sprof-basic (Haven't figured out yet, not related to hard-float) FAIL: gmon/tst-gmon-pie (PIE bug in or1k toolchain) FAIL: gmon/tst-gmon-pie-gprof (PIE bug in or1k toolchain) FAIL: iconvdata/iconv-test (timeout, passed when run manually) FAIL: nptl/tst-cond24 (Timeout) FAIL: nptl/tst-mutex10 (Timeout) # summary 6 FAIL 4289 PASS 86 UNSUPPORTED 16 XFAIL 2 XPASS # versions Toolchain: or1k-smhfpu-linux-gnu Compiler: gcc version 14.0.1 20240324 (experimental) [master r14-9649-gbb04a11418f] (GCC) Binutils: GNU assembler version 2.42.0 (or1k-smhfpu-linux-gnu) using BFD version (GNU Binutils) 2.42.0.20240324 Linux: Linux buildroot 6.9.0-rc1-00008-g4dc70e1aadfa #112 SMP Sat Apr 27 06:43:11 BST 2024 openrisc GNU/Linux Tester: shorne Glibc: 2024-04-25 b62928f907 Florian Weimer x86: In ld.so, diagnose missing APX support in APX-only builds (origin/master, origin/HEAD) Soft Float # failures FAIL: elf/tst-sprof-basic FAIL: gmon/tst-gmon-pie FAIL: gmon/tst-gmon-pie-gprof FAIL: nptl/tst-cond24 FAIL: nptl/tst-mutex10 # summary 5 FAIL 4295 PASS 81 UNSUPPORTED 16 XFAIL 2 XPASS # versions Toolchain: or1k-smh-linux-gnu Compiler: gcc version 14.0.1 20240324 (experimental) [master r14-9649-gbb04a11418f] (GCC) Binutils: GNU assembler version 2.42.0 (or1k-smh-linux-gnu) using BFD version (GNU Binutils) 2.42.0.20240324 Linux: Linux buildroot 6.9.0-rc1-00008-g4dc70e1aadfa #112 SMP Sat Apr 27 06:43:11 BST 2024 openrisc GNU/Linux Tester: shorne Glibc: 2024-04-25 b62928f907 Florian Weimer x86: In ld.so, diagnose missing APX support in APX-only builds (origin/master, origin/HEAD) Documentation: https://raw.githubusercontent.com/openrisc/doc/master/openrisc-arch-1.4-rev0.pdf Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
2024-04-27 05:35:09 +00:00
/* Set floating-point environment exception handling.
Copyright (C) 2024 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library. If not, see
<https://www.gnu.org/licenses/>. */
#include <fenv.h>
#include <fpu_control.h>
int
fesetexceptflag (const fexcept_t *flagp, int excepts)
{
fpu_control_t cw;
fpu_control_t cw_new;
/* Get the current exceptions. */
_FPU_GETCW (cw);
/* Make sure the flags we want restored are legal. */
excepts &= FE_ALL_EXCEPT;
/* Now set selected bits from flagp. Note that we ignore all non-flag
bits from *flagp, so they don't matter. */
cw_new = (cw & ~excepts) | (*flagp & excepts);
if (cw != cw_new)
_FPU_SETCW (cw_new);
/* Success. */
return 0;
}