glibc/sysdeps/s390/atomic-machine.h

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/* Copyright (C) 2003-2023 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
Prefer https to http for gnu.org and fsf.org URLs Also, change sources.redhat.com to sourceware.org. This patch was automatically generated by running the following shell script, which uses GNU sed, and which avoids modifying files imported from upstream: sed -ri ' s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g ' \ $(find $(git ls-files) -prune -type f \ ! -name '*.po' \ ! -name 'ChangeLog*' \ ! -path COPYING ! -path COPYING.LIB \ ! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \ ! -path manual/texinfo.tex ! -path scripts/config.guess \ ! -path scripts/config.sub ! -path scripts/install-sh \ ! -path scripts/mkinstalldirs ! -path scripts/move-if-change \ ! -path INSTALL ! -path locale/programs/charmap-kw.h \ ! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \ ! '(' -name configure \ -execdir test -f configure.ac -o -f configure.in ';' ')' \ ! '(' -name preconfigure \ -execdir test -f preconfigure.ac ';' ')' \ -print) and then by running 'make dist-prepare' to regenerate files built from the altered files, and then executing the following to cleanup: chmod a+x sysdeps/unix/sysv/linux/riscv/configure # Omit irrelevant whitespace and comment-only changes, # perhaps from a slightly-different Autoconf version. git checkout -f \ sysdeps/csky/configure \ sysdeps/hppa/configure \ sysdeps/riscv/configure \ sysdeps/unix/sysv/linux/csky/configure # Omit changes that caused a pre-commit check to fail like this: # remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines git checkout -f \ sysdeps/powerpc/powerpc64/ppc-mcount.S \ sysdeps/unix/sysv/linux/s390/s390-64/syscall.S # Omit change that caused a pre-commit check to fail like this: # remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
2019-09-07 05:40:42 +00:00
<https://www.gnu.org/licenses/>. */
S390: Optimize atomic macros. This patch activates C11 atomic builtins by defining USE_ATOMIC_COMPILER_BUILTINS to 1. Note: E.g. in nptl/pthread_key_delete.c if compiled with GCCs 6 and before, an extra stack-frame is generated and the old value is stored on stack before cs instruction but it never loads this value from stack. An unreleased GCC 7 omit those stack operations. E.g. in nptl/pthread_once.c the condition code of cs instruction is evaluated by a sequence of ipm, sra, compare and jump instructions instead of one conditional jump instruction. This also occurs with an unreleased GCC 7. These shortcomings does not really hurt. Nevertheless, the gcc guys are investigating those ones and plan to fix them before GCC 7 release. The atomic_fetch_abc_def C11 builtins are now using load-and-abc instructions on z196 zarch and higher cpus instead of a loop with compare-and-swap instruction. Some of the non-C11 atomic macros from include/atomic.h are now implemented with help of the C11 atomic builtins. The other non-C11 atomic macros are using the macros defined here. ChangeLog: * sysdeps/s390/atomic-machine.h (USE_ATOMIC_COMPILER_BUILTINS): Define to 1. (__arch_compare_and_exchange_val_8_acq, __arch_compare_and_exchange_val_16_acq, __arch_compare_and_exchange_val_32_acq, __arch_compare_and_exchange_val_64_acq): Delete macro. (atomic_compare_and_exchange_val_acq, atomic_compare_and_exchange_val_rel, atomic_compare_and_exchange_bool_acq, catomic_compare_and_exchange_bool_acq, atomic_exchange_acq, atomic_exchange_rel, atomic_exchange_and_add_acq, atomic_exchange_and_add_rel, catomic_exchange_and_add, atomic_or_val, atomic_or, catomic_or, atomic_bit_test_set, atomic_and_val, atomic_and, catomic_and): Define macros with help of C11 atomic builtins.
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/* Activate all C11 atomic builtins.
S390: Optimize atomic macros. This patch activates C11 atomic builtins by defining USE_ATOMIC_COMPILER_BUILTINS to 1. Note: E.g. in nptl/pthread_key_delete.c if compiled with GCCs 6 and before, an extra stack-frame is generated and the old value is stored on stack before cs instruction but it never loads this value from stack. An unreleased GCC 7 omit those stack operations. E.g. in nptl/pthread_once.c the condition code of cs instruction is evaluated by a sequence of ipm, sra, compare and jump instructions instead of one conditional jump instruction. This also occurs with an unreleased GCC 7. These shortcomings does not really hurt. Nevertheless, the gcc guys are investigating those ones and plan to fix them before GCC 7 release. The atomic_fetch_abc_def C11 builtins are now using load-and-abc instructions on z196 zarch and higher cpus instead of a loop with compare-and-swap instruction. Some of the non-C11 atomic macros from include/atomic.h are now implemented with help of the C11 atomic builtins. The other non-C11 atomic macros are using the macros defined here. ChangeLog: * sysdeps/s390/atomic-machine.h (USE_ATOMIC_COMPILER_BUILTINS): Define to 1. (__arch_compare_and_exchange_val_8_acq, __arch_compare_and_exchange_val_16_acq, __arch_compare_and_exchange_val_32_acq, __arch_compare_and_exchange_val_64_acq): Delete macro. (atomic_compare_and_exchange_val_acq, atomic_compare_and_exchange_val_rel, atomic_compare_and_exchange_bool_acq, catomic_compare_and_exchange_bool_acq, atomic_exchange_acq, atomic_exchange_rel, atomic_exchange_and_add_acq, atomic_exchange_and_add_rel, catomic_exchange_and_add, atomic_or_val, atomic_or, catomic_or, atomic_bit_test_set, atomic_and_val, atomic_and, catomic_and): Define macros with help of C11 atomic builtins.
2017-03-06 14:28:25 +00:00
Note:
E.g. in nptl/pthread_key_delete.c if compiled with GCCs 6 and before,
an extra stack-frame is generated and the old value is stored on stack
before cs instruction but it never loads this value from stack.
An unreleased GCC 7 omit those stack operations.
S390: Optimize atomic macros. This patch activates C11 atomic builtins by defining USE_ATOMIC_COMPILER_BUILTINS to 1. Note: E.g. in nptl/pthread_key_delete.c if compiled with GCCs 6 and before, an extra stack-frame is generated and the old value is stored on stack before cs instruction but it never loads this value from stack. An unreleased GCC 7 omit those stack operations. E.g. in nptl/pthread_once.c the condition code of cs instruction is evaluated by a sequence of ipm, sra, compare and jump instructions instead of one conditional jump instruction. This also occurs with an unreleased GCC 7. These shortcomings does not really hurt. Nevertheless, the gcc guys are investigating those ones and plan to fix them before GCC 7 release. The atomic_fetch_abc_def C11 builtins are now using load-and-abc instructions on z196 zarch and higher cpus instead of a loop with compare-and-swap instruction. Some of the non-C11 atomic macros from include/atomic.h are now implemented with help of the C11 atomic builtins. The other non-C11 atomic macros are using the macros defined here. ChangeLog: * sysdeps/s390/atomic-machine.h (USE_ATOMIC_COMPILER_BUILTINS): Define to 1. (__arch_compare_and_exchange_val_8_acq, __arch_compare_and_exchange_val_16_acq, __arch_compare_and_exchange_val_32_acq, __arch_compare_and_exchange_val_64_acq): Delete macro. (atomic_compare_and_exchange_val_acq, atomic_compare_and_exchange_val_rel, atomic_compare_and_exchange_bool_acq, catomic_compare_and_exchange_bool_acq, atomic_exchange_acq, atomic_exchange_rel, atomic_exchange_and_add_acq, atomic_exchange_and_add_rel, catomic_exchange_and_add, atomic_or_val, atomic_or, catomic_or, atomic_bit_test_set, atomic_and_val, atomic_and, catomic_and): Define macros with help of C11 atomic builtins.
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E.g. in nptl/pthread_once.c the condition code of cs instruction is
evaluated by a sequence of ipm, sra, compare and jump instructions instead
of one conditional jump instruction. This also occurs with an unreleased
GCC 7.
S390: Optimize atomic macros. This patch activates C11 atomic builtins by defining USE_ATOMIC_COMPILER_BUILTINS to 1. Note: E.g. in nptl/pthread_key_delete.c if compiled with GCCs 6 and before, an extra stack-frame is generated and the old value is stored on stack before cs instruction but it never loads this value from stack. An unreleased GCC 7 omit those stack operations. E.g. in nptl/pthread_once.c the condition code of cs instruction is evaluated by a sequence of ipm, sra, compare and jump instructions instead of one conditional jump instruction. This also occurs with an unreleased GCC 7. These shortcomings does not really hurt. Nevertheless, the gcc guys are investigating those ones and plan to fix them before GCC 7 release. The atomic_fetch_abc_def C11 builtins are now using load-and-abc instructions on z196 zarch and higher cpus instead of a loop with compare-and-swap instruction. Some of the non-C11 atomic macros from include/atomic.h are now implemented with help of the C11 atomic builtins. The other non-C11 atomic macros are using the macros defined here. ChangeLog: * sysdeps/s390/atomic-machine.h (USE_ATOMIC_COMPILER_BUILTINS): Define to 1. (__arch_compare_and_exchange_val_8_acq, __arch_compare_and_exchange_val_16_acq, __arch_compare_and_exchange_val_32_acq, __arch_compare_and_exchange_val_64_acq): Delete macro. (atomic_compare_and_exchange_val_acq, atomic_compare_and_exchange_val_rel, atomic_compare_and_exchange_bool_acq, catomic_compare_and_exchange_bool_acq, atomic_exchange_acq, atomic_exchange_rel, atomic_exchange_and_add_acq, atomic_exchange_and_add_rel, catomic_exchange_and_add, atomic_or_val, atomic_or, catomic_or, atomic_bit_test_set, atomic_and_val, atomic_and, catomic_and): Define macros with help of C11 atomic builtins.
2017-03-06 14:28:25 +00:00
The atomic_fetch_abc_def C11 builtins are now using load-and-abc instructions
on z196 zarch and higher cpus instead of a loop with compare-and-swap
instruction. */
#define USE_ATOMIC_COMPILER_BUILTINS 1
#ifdef __s390x__
# define __HAVE_64B_ATOMICS 1
#else
# define __HAVE_64B_ATOMICS 0
#endif
Optimize generic spinlock code and use C11 like atomic macros. This patch optimizes the generic spinlock code. The type pthread_spinlock_t is a typedef to volatile int on all archs. Passing a volatile pointer to the atomic macros which are not mapped to the C11 atomic builtins can lead to extra stores and loads to stack if such a macro creates a temporary variable by using "__typeof (*(mem)) tmp;". Thus, those macros which are used by spinlock code - atomic_exchange_acquire, atomic_load_relaxed, atomic_compare_exchange_weak - have to be adjusted. According to the comment from Szabolcs Nagy, the type of a cast expression is unqualified (see http://www.open-std.org/jtc1/sc22/wg14/www/docs/dr_423.htm): __typeof ((__typeof (*(mem)) *(mem)) tmp; Thus from spinlock perspective the variable tmp is of type int instead of type volatile int. This patch adjusts those macros in include/atomic.h. With this construct GCC >= 5 omits the extra stores and loads. The atomic macros are replaced by the C11 like atomic macros and thus the code is aligned to it. The pthread_spin_unlock implementation is now using release memory order instead of sequentially consistent memory order. The issue with passed volatile int pointers applies to the C11 like atomic macros as well as the ones used before. I've added a glibc_likely hint to the first atomic exchange in pthread_spin_lock in order to return immediately to the caller if the lock is free. Without the hint, there is an additional jump if the lock is free. I've added the atomic_spin_nop macro within the loop of plain reads. The plain reads are also realized by C11 like atomic_load_relaxed macro. The new define ATOMIC_EXCHANGE_USES_CAS determines if the first try to acquire the spinlock in pthread_spin_lock or pthread_spin_trylock is an exchange or a CAS. This is defined in atomic-machine.h for all architectures. The define SPIN_LOCK_READS_BETWEEN_CMPXCHG is now removed. There is no technical reason for throwing in a CAS every now and then, and so far we have no evidence that it can improve performance. If that would be the case, we have to adjust other spin-waiting loops elsewhere, too! Using a CAS loop without plain reads is not a good idea on many targets and wasn't used by one. Thus there is now no option to do so. Architectures are now using the generic spinlock automatically if they do not provide an own implementation. Thus the pthread_spin_lock.c files in sysdeps folder are deleted. ChangeLog: * NEWS: Mention new spinlock implementation. * include/atomic.h: (__atomic_val_bysize): Cast type to omit volatile qualifier. (atomic_exchange_acq): Likewise. (atomic_load_relaxed): Likewise. (ATOMIC_EXCHANGE_USES_CAS): Check definition. * nptl/pthread_spin_init.c (pthread_spin_init): Use atomic_store_relaxed. * nptl/pthread_spin_lock.c (pthread_spin_lock): Use C11-like atomic macros. * nptl/pthread_spin_trylock.c (pthread_spin_trylock): Likewise. * nptl/pthread_spin_unlock.c (pthread_spin_unlock): Use atomic_store_release. * sysdeps/aarch64/nptl/pthread_spin_lock.c: Delete File. * sysdeps/arm/nptl/pthread_spin_lock.c: Likewise. * sysdeps/hppa/nptl/pthread_spin_lock.c: Likewise. * sysdeps/m68k/nptl/pthread_spin_lock.c: Likewise. * sysdeps/microblaze/nptl/pthread_spin_lock.c: Likewise. * sysdeps/mips/nptl/pthread_spin_lock.c: Likewise. * sysdeps/nios2/nptl/pthread_spin_lock.c: Likewise. * sysdeps/aarch64/atomic-machine.h (ATOMIC_EXCHANGE_USES_CAS): Define. * sysdeps/alpha/atomic-machine.h: Likewise. * sysdeps/arm/atomic-machine.h: Likewise. * sysdeps/i386/atomic-machine.h: Likewise. * sysdeps/ia64/atomic-machine.h: Likewise. * sysdeps/m68k/coldfire/atomic-machine.h: Likewise. * sysdeps/m68k/m680x0/m68020/atomic-machine.h: Likewise. * sysdeps/microblaze/atomic-machine.h: Likewise. * sysdeps/mips/atomic-machine.h: Likewise. * sysdeps/powerpc/powerpc32/atomic-machine.h: Likewise. * sysdeps/powerpc/powerpc64/atomic-machine.h: Likewise. * sysdeps/s390/atomic-machine.h: Likewise. * sysdeps/sparc/sparc32/atomic-machine.h: Likewise. * sysdeps/sparc/sparc32/sparcv9/atomic-machine.h: Likewise. * sysdeps/sparc/sparc64/atomic-machine.h: Likewise. * sysdeps/tile/tilegx/atomic-machine.h: Likewise. * sysdeps/tile/tilepro/atomic-machine.h: Likewise. * sysdeps/unix/sysv/linux/hppa/atomic-machine.h: Likewise. * sysdeps/unix/sysv/linux/m68k/coldfire/atomic-machine.h: Likewise. * sysdeps/unix/sysv/linux/nios2/atomic-machine.h: Likewise. * sysdeps/unix/sysv/linux/sh/atomic-machine.h: Likewise. * sysdeps/x86_64/atomic-machine.h: Likewise.
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#define ATOMIC_EXCHANGE_USES_CAS 1
S390: Optimize atomic macros. This patch activates C11 atomic builtins by defining USE_ATOMIC_COMPILER_BUILTINS to 1. Note: E.g. in nptl/pthread_key_delete.c if compiled with GCCs 6 and before, an extra stack-frame is generated and the old value is stored on stack before cs instruction but it never loads this value from stack. An unreleased GCC 7 omit those stack operations. E.g. in nptl/pthread_once.c the condition code of cs instruction is evaluated by a sequence of ipm, sra, compare and jump instructions instead of one conditional jump instruction. This also occurs with an unreleased GCC 7. These shortcomings does not really hurt. Nevertheless, the gcc guys are investigating those ones and plan to fix them before GCC 7 release. The atomic_fetch_abc_def C11 builtins are now using load-and-abc instructions on z196 zarch and higher cpus instead of a loop with compare-and-swap instruction. Some of the non-C11 atomic macros from include/atomic.h are now implemented with help of the C11 atomic builtins. The other non-C11 atomic macros are using the macros defined here. ChangeLog: * sysdeps/s390/atomic-machine.h (USE_ATOMIC_COMPILER_BUILTINS): Define to 1. (__arch_compare_and_exchange_val_8_acq, __arch_compare_and_exchange_val_16_acq, __arch_compare_and_exchange_val_32_acq, __arch_compare_and_exchange_val_64_acq): Delete macro. (atomic_compare_and_exchange_val_acq, atomic_compare_and_exchange_val_rel, atomic_compare_and_exchange_bool_acq, catomic_compare_and_exchange_bool_acq, atomic_exchange_acq, atomic_exchange_rel, atomic_exchange_and_add_acq, atomic_exchange_and_add_rel, catomic_exchange_and_add, atomic_or_val, atomic_or, catomic_or, atomic_bit_test_set, atomic_and_val, atomic_and, catomic_and): Define macros with help of C11 atomic builtins.
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/* Implement some of the non-C11 atomic macros from include/atomic.h
with help of the C11 atomic builtins. The other non-C11 atomic macros
are using the macros defined here. */
/* Atomically store NEWVAL in *MEM if *MEM is equal to OLDVAL.
Return the old *MEM value. */
#define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
({ __atomic_check_size((mem)); \
typeof ((__typeof (*(mem))) *(mem)) __atg1_oldval = (oldval); \
__atomic_compare_exchange_n (mem, (void *) &__atg1_oldval, \
newval, 1, __ATOMIC_ACQUIRE, \
__ATOMIC_RELAXED); \
__atg1_oldval; })
#define atomic_compare_and_exchange_val_rel(mem, newval, oldval) \
({ __atomic_check_size((mem)); \
typeof ((__typeof (*(mem))) *(mem)) __atg1_2_oldval = (oldval); \
__atomic_compare_exchange_n (mem, (void *) &__atg1_2_oldval, \
newval, 1, __ATOMIC_RELEASE, \
__ATOMIC_RELAXED); \
__atg1_2_oldval; })
/* Atomically store NEWVAL in *MEM if *MEM is equal to OLDVAL.
Return zero if *MEM was changed or non-zero if no exchange happened. */
#define atomic_compare_and_exchange_bool_acq(mem, newval, oldval) \
({ __atomic_check_size((mem)); \
typeof ((__typeof (*(mem))) *(mem)) __atg2_oldval = (oldval); \
!__atomic_compare_exchange_n (mem, (void *) &__atg2_oldval, newval, \
1, __ATOMIC_ACQUIRE, \
__ATOMIC_RELAXED); })
#define catomic_compare_and_exchange_bool_acq(mem, newval, oldval) \
atomic_compare_and_exchange_bool_acq (mem, newval, oldval)
/* Store NEWVALUE in *MEM and return the old value. */
S390: Optimize atomic macros. This patch activates C11 atomic builtins by defining USE_ATOMIC_COMPILER_BUILTINS to 1. Note: E.g. in nptl/pthread_key_delete.c if compiled with GCCs 6 and before, an extra stack-frame is generated and the old value is stored on stack before cs instruction but it never loads this value from stack. An unreleased GCC 7 omit those stack operations. E.g. in nptl/pthread_once.c the condition code of cs instruction is evaluated by a sequence of ipm, sra, compare and jump instructions instead of one conditional jump instruction. This also occurs with an unreleased GCC 7. These shortcomings does not really hurt. Nevertheless, the gcc guys are investigating those ones and plan to fix them before GCC 7 release. The atomic_fetch_abc_def C11 builtins are now using load-and-abc instructions on z196 zarch and higher cpus instead of a loop with compare-and-swap instruction. Some of the non-C11 atomic macros from include/atomic.h are now implemented with help of the C11 atomic builtins. The other non-C11 atomic macros are using the macros defined here. ChangeLog: * sysdeps/s390/atomic-machine.h (USE_ATOMIC_COMPILER_BUILTINS): Define to 1. (__arch_compare_and_exchange_val_8_acq, __arch_compare_and_exchange_val_16_acq, __arch_compare_and_exchange_val_32_acq, __arch_compare_and_exchange_val_64_acq): Delete macro. (atomic_compare_and_exchange_val_acq, atomic_compare_and_exchange_val_rel, atomic_compare_and_exchange_bool_acq, catomic_compare_and_exchange_bool_acq, atomic_exchange_acq, atomic_exchange_rel, atomic_exchange_and_add_acq, atomic_exchange_and_add_rel, catomic_exchange_and_add, atomic_or_val, atomic_or, catomic_or, atomic_bit_test_set, atomic_and_val, atomic_and, catomic_and): Define macros with help of C11 atomic builtins.
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#define atomic_exchange_acq(mem, newvalue) \
({ __atomic_check_size((mem)); \
__atomic_exchange_n (mem, newvalue, __ATOMIC_ACQUIRE); })
#define atomic_exchange_rel(mem, newvalue) \
({ __atomic_check_size((mem)); \
__atomic_exchange_n (mem, newvalue, __ATOMIC_RELEASE); })
/* Add VALUE to *MEM and return the old value of *MEM. */
/* The gcc builtin uses load-and-add instruction on z196 zarch and higher cpus
instead of a loop with compare-and-swap instruction. */
# define atomic_exchange_and_add_acq(mem, operand) \
({ __atomic_check_size((mem)); \
__atomic_fetch_add ((mem), (operand), __ATOMIC_ACQUIRE); })
# define atomic_exchange_and_add_rel(mem, operand) \
({ __atomic_check_size((mem)); \
__atomic_fetch_add ((mem), (operand), __ATOMIC_RELEASE); })
#define catomic_exchange_and_add(mem, value) \
atomic_exchange_and_add (mem, value)
/* Atomically *mem |= mask and return the old value of *mem. */
/* The gcc builtin uses load-and-or instruction on z196 zarch and higher cpus
instead of a loop with compare-and-swap instruction. */
#define atomic_or_val(mem, operand) \
({ __atomic_check_size((mem)); \
__atomic_fetch_or ((mem), (operand), __ATOMIC_ACQUIRE); })
/* Atomically *mem |= mask. */
#define atomic_or(mem, mask) \
do { \
atomic_or_val (mem, mask); \
} while (0)
#define catomic_or(mem, mask) \
atomic_or (mem, mask)
/* Atomically *mem |= 1 << bit and return true if the bit was set in old value
of *mem. */
/* The load-and-or instruction is used on z196 zarch and higher cpus
instead of a loop with compare-and-swap instruction. */
#define atomic_bit_test_set(mem, bit) \
({ __typeof (*(mem)) __atg14_old; \
__typeof (mem) __atg14_memp = (mem); \
__typeof (*(mem)) __atg14_mask = ((__typeof (*(mem))) 1 << (bit)); \
__atg14_old = atomic_or_val (__atg14_memp, __atg14_mask); \
__atg14_old & __atg14_mask; })
/* Atomically *mem &= mask and return the old value of *mem. */
/* The gcc builtin uses load-and-and instruction on z196 zarch and higher cpus
instead of a loop with compare-and-swap instruction. */
#define atomic_and_val(mem, operand) \
({ __atomic_check_size((mem)); \
__atomic_fetch_and ((mem), (operand), __ATOMIC_ACQUIRE); })
/* Atomically *mem &= mask. */
#define atomic_and(mem, mask) \
do { \
atomic_and_val (mem, mask); \
} while (0)
#define catomic_and(mem, mask) \
atomic_and(mem, mask)