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glibc/sysdeps/sparc/sparc64/Makefile

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sparc: build with -mvis on sparc32/sparcv9 and sparc64 When building for sparc32/sparcv9 or sparc64, we assume that VIS instructions are available and use them in the sparc specific assembly code. However we do not tell GCC to use such instructions, resulting in slightly suboptimal code. Fix that by passing -Wa,-Av9a -mvis to GCC. Changelog: * sysdeps/sparc/sparc32/sparcv9/Makefile (sysdep-CFLAGS): Add -mvis. * sysdeps/sparc/sparc64/Makefile (sysdep-CFLAGS): New. Define to -Wa,-Av9a -mvis.
2016-08-05 20:35:01 +00:00
sysdep-CFLAGS += -Wa,-Av9a -mvis
sparc: Reimplement 64-bit aligned copy routines and remove from memcpy files. 2010-02-25 David S. Miller <davem@davemloft.net> * sysdeps/sparc/sparc64/Makefile: Add align-cpy rule. * sysdeps/sparc/sparc64/align-cpy.S: New. * sysdeps/sparc/sparc64/memcpy.S (__align_cpy_1, __align_cpy_2, __align_cpy_4, __align_cpy_8, __align_cpy_16): Remove. * sysdeps/sparc/sparc64/sparcv9b/memcpy.S (__align_cpy_1, __align_cpy_2, __align_cpy_4, __align_cpy_8, __align_cpy_16): Remove. * sysdeps/sparc/sparc64/sparcv9v/memcpy.S (__align_cpy_1, __align_cpy_2, __align_cpy_4, __align_cpy_8, __align_cpy_16): Remove. * sysdeps/sparc/sparc64/sparcv9v2/memcpy.S (__align_cpy_1, __align_cpy_2, __align_cpy_4, __align_cpy_8, __align_cpy_16): Remove.
2010-02-22 04:12:29 +00:00
ifeq ($(subdir),string)
sysdep_routines += align-cpy
endif
Add framework for using sparc VIS3 instructions, use it for copysign/signbit. * sysdeps/sparc/configure.in: New file. * sysdeps/sparc/configure: Generate. * configure.in (libc_cv_sparc_as_vis3): Substitute. * configure: Regenerate. * config.h.in (HAVE_AS_VIS3_SUPPORT): New. * config.make.in (have-as-vis3): New. * sysdeps/sparc/sparc32/sparcv9/Makefile (ASFLAGS-*): If VIS3 is available use -Av9d instead of -Av9a. * sysdeps/sparc/sparc64/Makefile: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S: New file.
2012-03-14 23:29:47 +00:00
ASFLAGS-.o += -Wa,-Av9d
ASFLAGS-.os += -Wa,-Av9d
ASFLAGS-.op += -Wa,-Av9d
ASFLAGS-.oS += -Wa,-Av9d
SPARC: Consolidate unnecessary nptl/ subdirectories.
2014-06-25 17:04:14 +00:00
Fix sparc build. * sysdeps/sparc/nptl/pthread_barrier_init.c: Include futex-intenal.h * sysdeps/sparc/sparc32/sparcv9/Makefile (nscd): Add cpu_relax. * sysdeps/sparc/sparc64/Makefile: Likewise. * sysdeps/sparc/sparc32/sparcv9/bits/atomic.h (atomic_spin_nop): Remove space from macro define. * sysdeps/sparc/sparc64/bits/atomic.h (atomic_spin_nop): Likewise.
2015-07-15 22:22:48 +00:00
# nscd uses atomic_spin_nop which in turn requires cpu_relax
ifeq ($(subdir),nscd)
routines += cpu_relax
endif
SPARC: Consolidate unnecessary nptl/ subdirectories.
2014-06-25 17:04:14 +00:00
ifeq ($(subdir),nptl)
libpthread-routines += cpu_relax
endif
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