glibc/sysdeps/riscv/rvf/fenv_private.h

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RISC-V: Hard Float Support This patch contains hardware floating-point support for the RISC-V ISA. While we currently only support hard-float systems with both the F and D extensions, I've left the F-specific code split out into seperate folders in order to ease adding support for F-only and RV32I-based systems in the future. I gave this a quick once-over and believe I've removed all the code that implements RV32IF, RV32IFD, and RV64IF targets. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/rv64/rvd/s_ceil.c: New file. * sysdeps/riscv/rv64/rvd/s_floor.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_nearbyint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_rint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_round.c: Likewise. * sysdeps/riscv/rv64/rvd/s_roundeven.c: Likewise. * sysdeps/riscv/rv64/rvd/s_trunc.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llroundf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lroundf.c: Likewise. * sysdeps/riscv/rvd/e_sqrt.c: Likewise. * sysdeps/riscv/rvd/s_copysign.c: Likewise. * sysdeps/riscv/rvd/s_finite.c: Likewise. * sysdeps/riscv/rvd/s_fma.c: Likewise. * sysdeps/riscv/rvd/s_fmax.c: Likewise. * sysdeps/riscv/rvd/s_fmin.c: Likewise. * sysdeps/riscv/rvd/s_fpclassify.c: Likewise. * sysdeps/riscv/rvd/s_isinf.c: Likewise. * sysdeps/riscv/rvd/s_isnan.c: Likewise. * sysdeps/riscv/rvd/s_issignaling.c: Likewise. * sysdeps/riscv/rvf/e_sqrtf.c: Likewise. * sysdeps/riscv/rvf/fclrexcpt.c: Likewise. * sysdeps/riscv/rvf/fegetenv.c: Likewise. * sysdeps/riscv/rvf/fegetmode.c: Likewise. * sysdeps/riscv/rvf/fegetround.c: Likewise. * sysdeps/riscv/rvf/feholdexcpt.c: Likewise. * sysdeps/riscv/rvf/fesetenv.c: Likewise. * sysdeps/riscv/rvf/fesetexcept.c: Likewise. * sysdeps/riscv/rvf/fesetmode.c: Likewise. * sysdeps/riscv/rvf/fesetround.c: Likewise. * sysdeps/riscv/rvf/feupdateenv.c: Likewise. * sysdeps/riscv/rvf/fgetexcptflg.c: Likewise. * sysdeps/riscv/rvf/fraiseexcpt.c: Likewise. * sysdeps/riscv/rvf/fsetexcptflg.c: Likewise. * sysdeps/riscv/rvf/ftestexcept.c: Likewise. * sysdeps/riscv/rvf/get-rounding-mode.h: Likewise. * sysdeps/riscv/rvf/math_private.h: Likewise. * sysdeps/riscv/rvf/s_ceilf.c: Likewise. * sysdeps/riscv/rvf/s_copysignf.c: Likewise. * sysdeps/riscv/rvf/s_finitef.c: Likewise. * sysdeps/riscv/rvf/s_floorf.c: Likewise. * sysdeps/riscv/rvf/s_fmaf.c: Likewise. * sysdeps/riscv/rvf/s_fmaxf.c: Likewise. * sysdeps/riscv/rvf/s_fminf.c: Likewise. * sysdeps/riscv/rvf/s_fpclassifyf.c: Likewise. * sysdeps/riscv/rvf/s_isinff.c: Likewise. * sysdeps/riscv/rvf/s_isnanf.c: Likewise. * sysdeps/riscv/rvf/s_issignalingf.c: Likewise. * sysdeps/riscv/rvf/s_nearbyintf.c: Likewise. * sysdeps/riscv/rvf/s_rintf.c: Likewise. * sysdeps/riscv/rvf/s_roundevenf.c: Likewise. * sysdeps/riscv/rvf/s_roundf.c: Likewise. * sysdeps/riscv/rvf/s_truncf.c: Likewise.
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/* Private floating point rounding and exceptions handling. RISC-V version.
Copyright (C) 2014-2022 Free Software Foundation, Inc.
RISC-V: Hard Float Support This patch contains hardware floating-point support for the RISC-V ISA. While we currently only support hard-float systems with both the F and D extensions, I've left the F-specific code split out into seperate folders in order to ease adding support for F-only and RV32I-based systems in the future. I gave this a quick once-over and believe I've removed all the code that implements RV32IF, RV32IFD, and RV64IF targets. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/rv64/rvd/s_ceil.c: New file. * sysdeps/riscv/rv64/rvd/s_floor.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_nearbyint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_rint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_round.c: Likewise. * sysdeps/riscv/rv64/rvd/s_roundeven.c: Likewise. * sysdeps/riscv/rv64/rvd/s_trunc.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llroundf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lroundf.c: Likewise. * sysdeps/riscv/rvd/e_sqrt.c: Likewise. * sysdeps/riscv/rvd/s_copysign.c: Likewise. * sysdeps/riscv/rvd/s_finite.c: Likewise. * sysdeps/riscv/rvd/s_fma.c: Likewise. * sysdeps/riscv/rvd/s_fmax.c: Likewise. * sysdeps/riscv/rvd/s_fmin.c: Likewise. * sysdeps/riscv/rvd/s_fpclassify.c: Likewise. * sysdeps/riscv/rvd/s_isinf.c: Likewise. * sysdeps/riscv/rvd/s_isnan.c: Likewise. * sysdeps/riscv/rvd/s_issignaling.c: Likewise. * sysdeps/riscv/rvf/e_sqrtf.c: Likewise. * sysdeps/riscv/rvf/fclrexcpt.c: Likewise. * sysdeps/riscv/rvf/fegetenv.c: Likewise. * sysdeps/riscv/rvf/fegetmode.c: Likewise. * sysdeps/riscv/rvf/fegetround.c: Likewise. * sysdeps/riscv/rvf/feholdexcpt.c: Likewise. * sysdeps/riscv/rvf/fesetenv.c: Likewise. * sysdeps/riscv/rvf/fesetexcept.c: Likewise. * sysdeps/riscv/rvf/fesetmode.c: Likewise. * sysdeps/riscv/rvf/fesetround.c: Likewise. * sysdeps/riscv/rvf/feupdateenv.c: Likewise. * sysdeps/riscv/rvf/fgetexcptflg.c: Likewise. * sysdeps/riscv/rvf/fraiseexcpt.c: Likewise. * sysdeps/riscv/rvf/fsetexcptflg.c: Likewise. * sysdeps/riscv/rvf/ftestexcept.c: Likewise. * sysdeps/riscv/rvf/get-rounding-mode.h: Likewise. * sysdeps/riscv/rvf/math_private.h: Likewise. * sysdeps/riscv/rvf/s_ceilf.c: Likewise. * sysdeps/riscv/rvf/s_copysignf.c: Likewise. * sysdeps/riscv/rvf/s_finitef.c: Likewise. * sysdeps/riscv/rvf/s_floorf.c: Likewise. * sysdeps/riscv/rvf/s_fmaf.c: Likewise. * sysdeps/riscv/rvf/s_fmaxf.c: Likewise. * sysdeps/riscv/rvf/s_fminf.c: Likewise. * sysdeps/riscv/rvf/s_fpclassifyf.c: Likewise. * sysdeps/riscv/rvf/s_isinff.c: Likewise. * sysdeps/riscv/rvf/s_isnanf.c: Likewise. * sysdeps/riscv/rvf/s_issignalingf.c: Likewise. * sysdeps/riscv/rvf/s_nearbyintf.c: Likewise. * sysdeps/riscv/rvf/s_rintf.c: Likewise. * sysdeps/riscv/rvf/s_roundevenf.c: Likewise. * sysdeps/riscv/rvf/s_roundf.c: Likewise. * sysdeps/riscv/rvf/s_truncf.c: Likewise.
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This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
Prefer https to http for gnu.org and fsf.org URLs Also, change sources.redhat.com to sourceware.org. This patch was automatically generated by running the following shell script, which uses GNU sed, and which avoids modifying files imported from upstream: sed -ri ' s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g ' \ $(find $(git ls-files) -prune -type f \ ! -name '*.po' \ ! -name 'ChangeLog*' \ ! -path COPYING ! -path COPYING.LIB \ ! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \ ! -path manual/texinfo.tex ! -path scripts/config.guess \ ! -path scripts/config.sub ! -path scripts/install-sh \ ! -path scripts/mkinstalldirs ! -path scripts/move-if-change \ ! -path INSTALL ! -path locale/programs/charmap-kw.h \ ! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \ ! '(' -name configure \ -execdir test -f configure.ac -o -f configure.in ';' ')' \ ! '(' -name preconfigure \ -execdir test -f preconfigure.ac ';' ')' \ -print) and then by running 'make dist-prepare' to regenerate files built from the altered files, and then executing the following to cleanup: chmod a+x sysdeps/unix/sysv/linux/riscv/configure # Omit irrelevant whitespace and comment-only changes, # perhaps from a slightly-different Autoconf version. git checkout -f \ sysdeps/csky/configure \ sysdeps/hppa/configure \ sysdeps/riscv/configure \ sysdeps/unix/sysv/linux/csky/configure # Omit changes that caused a pre-commit check to fail like this: # remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines git checkout -f \ sysdeps/powerpc/powerpc64/ppc-mcount.S \ sysdeps/unix/sysv/linux/s390/s390-64/syscall.S # Omit change that caused a pre-commit check to fail like this: # remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
2019-09-07 05:40:42 +00:00
<https://www.gnu.org/licenses/>. */
RISC-V: Hard Float Support This patch contains hardware floating-point support for the RISC-V ISA. While we currently only support hard-float systems with both the F and D extensions, I've left the F-specific code split out into seperate folders in order to ease adding support for F-only and RV32I-based systems in the future. I gave this a quick once-over and believe I've removed all the code that implements RV32IF, RV32IFD, and RV64IF targets. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/rv64/rvd/s_ceil.c: New file. * sysdeps/riscv/rv64/rvd/s_floor.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_nearbyint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_rint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_round.c: Likewise. * sysdeps/riscv/rv64/rvd/s_roundeven.c: Likewise. * sysdeps/riscv/rv64/rvd/s_trunc.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llroundf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lroundf.c: Likewise. * sysdeps/riscv/rvd/e_sqrt.c: Likewise. * sysdeps/riscv/rvd/s_copysign.c: Likewise. * sysdeps/riscv/rvd/s_finite.c: Likewise. * sysdeps/riscv/rvd/s_fma.c: Likewise. * sysdeps/riscv/rvd/s_fmax.c: Likewise. * sysdeps/riscv/rvd/s_fmin.c: Likewise. * sysdeps/riscv/rvd/s_fpclassify.c: Likewise. * sysdeps/riscv/rvd/s_isinf.c: Likewise. * sysdeps/riscv/rvd/s_isnan.c: Likewise. * sysdeps/riscv/rvd/s_issignaling.c: Likewise. * sysdeps/riscv/rvf/e_sqrtf.c: Likewise. * sysdeps/riscv/rvf/fclrexcpt.c: Likewise. * sysdeps/riscv/rvf/fegetenv.c: Likewise. * sysdeps/riscv/rvf/fegetmode.c: Likewise. * sysdeps/riscv/rvf/fegetround.c: Likewise. * sysdeps/riscv/rvf/feholdexcpt.c: Likewise. * sysdeps/riscv/rvf/fesetenv.c: Likewise. * sysdeps/riscv/rvf/fesetexcept.c: Likewise. * sysdeps/riscv/rvf/fesetmode.c: Likewise. * sysdeps/riscv/rvf/fesetround.c: Likewise. * sysdeps/riscv/rvf/feupdateenv.c: Likewise. * sysdeps/riscv/rvf/fgetexcptflg.c: Likewise. * sysdeps/riscv/rvf/fraiseexcpt.c: Likewise. * sysdeps/riscv/rvf/fsetexcptflg.c: Likewise. * sysdeps/riscv/rvf/ftestexcept.c: Likewise. * sysdeps/riscv/rvf/get-rounding-mode.h: Likewise. * sysdeps/riscv/rvf/math_private.h: Likewise. * sysdeps/riscv/rvf/s_ceilf.c: Likewise. * sysdeps/riscv/rvf/s_copysignf.c: Likewise. * sysdeps/riscv/rvf/s_finitef.c: Likewise. * sysdeps/riscv/rvf/s_floorf.c: Likewise. * sysdeps/riscv/rvf/s_fmaf.c: Likewise. * sysdeps/riscv/rvf/s_fmaxf.c: Likewise. * sysdeps/riscv/rvf/s_fminf.c: Likewise. * sysdeps/riscv/rvf/s_fpclassifyf.c: Likewise. * sysdeps/riscv/rvf/s_isinff.c: Likewise. * sysdeps/riscv/rvf/s_isnanf.c: Likewise. * sysdeps/riscv/rvf/s_issignalingf.c: Likewise. * sysdeps/riscv/rvf/s_nearbyintf.c: Likewise. * sysdeps/riscv/rvf/s_rintf.c: Likewise. * sysdeps/riscv/rvf/s_roundevenf.c: Likewise. * sysdeps/riscv/rvf/s_roundf.c: Likewise. * sysdeps/riscv/rvf/s_truncf.c: Likewise.
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Split fenv_private.h out of math_private.h more consistently. On some architectures, the parts of math_private.h relating to the floating-point environment are in a separate file fenv_private.h included from math_private.h. As this is purely an architecture-specific convention used by several architectures, however, all such architectures still need their own math_private.h, even if it has nothing to do beyond #include <fenv_private.h> and peculiarity of including the i386 file directly instead of having a shared file in sysdeps/x86. This patch makes the fenv_private.h name an architecture-independent convention in glibc. The include of fenv_private.h from math_private.h becomes architecture-independent (until callers are updated to include fenv_private.h directly so the include from math_private.h is no longer needed). Some architecture math_private.h headers are removed if no longer needed, or renamed to fenv_private.h if all they define belongs in that header; architecture fenv_private.h headers now do require #include_next <fenv_private.h>. The i386 fenv_private.h file moves to sysdeps/x86/fpu/ to reflect how it is actually shared with x86_64. The generic math_private.h gets a new include of <stdbool.h>, as needed for bool in some prototypes in that header (previously that was indirectly included via include/fenv.h, which now only gets included too late in math_private.h, after those prototypes). Tested for x86_64 and x86, and tested with build-many-glibcs.py that installed stripped shared libraries are unchanged by the patch. * sysdeps/aarch64/fpu/fenv_private.h: New file. Based on .... * sysdeps/aarch64/fpu/math_private.h: ... this file. All contents moved to fenv_private.h except for ... (TOINT_INTRINSICS): Kept in math_private.h. (roundtoint): Likewise. (converttoint): Likewise. * sysdeps/arm/fenv_private.h: Change multiple-include guard to [ARM_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/arm/math_private.h: Remove. * sysdeps/generic/fenv_private.h: New file. Contents moved from .... * sysdeps/generic/math_private.h: ... this file. Include <stdbool.h>. Do not include <fenv.h> or <get-rounding-mode.h>. Include <fenv_private.h>. Remove functions and macros moved to fenv_private.h. * sysdeps/i386/fpu/math_private.h: Remove. * sysdeps/mips/math_private.h: Move to .... * sysdeps/mips/fpu/fenv_private.h: ... here. Change multiple-include guard to [MIPS_FENV_PRIVATE_H]. Remove [__mips_hard_float] conditional. Include next <fenv_private.h>. * sysdeps/powerpc/fpu/fenv_private.h: Change multiple-include guard to [POWERPC_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/powerpc/fpu/math_private.h: Do not include <fenv_private.h>. * sysdeps/riscv/rvf/math_private.h: Move to .... * sysdeps/riscv/rvf/fenv_private.h: ... here. Change multiple-include guard to [RISCV_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/sparc/fpu/fenv_private.h: Change multiple-include guard to [SPARC_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/sparc/fpu/math_private.h: Remove. * sysdeps/i386/fpu/fenv_private.h: Move to .... * sysdeps/x86/fpu/fenv_private.h: ... here. Change multiple-include guard to [X86_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/x86_64/fpu/math_private.h: Do not include <sysdeps/i386/fpu/fenv_private.h>.
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#ifndef RISCV_FENV_PRIVATE_H
#define RISCV_FENV_PRIVATE_H 1
RISC-V: Hard Float Support This patch contains hardware floating-point support for the RISC-V ISA. While we currently only support hard-float systems with both the F and D extensions, I've left the F-specific code split out into seperate folders in order to ease adding support for F-only and RV32I-based systems in the future. I gave this a quick once-over and believe I've removed all the code that implements RV32IF, RV32IFD, and RV64IF targets. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/rv64/rvd/s_ceil.c: New file. * sysdeps/riscv/rv64/rvd/s_floor.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_nearbyint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_rint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_round.c: Likewise. * sysdeps/riscv/rv64/rvd/s_roundeven.c: Likewise. * sysdeps/riscv/rv64/rvd/s_trunc.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llroundf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lroundf.c: Likewise. * sysdeps/riscv/rvd/e_sqrt.c: Likewise. * sysdeps/riscv/rvd/s_copysign.c: Likewise. * sysdeps/riscv/rvd/s_finite.c: Likewise. * sysdeps/riscv/rvd/s_fma.c: Likewise. * sysdeps/riscv/rvd/s_fmax.c: Likewise. * sysdeps/riscv/rvd/s_fmin.c: Likewise. * sysdeps/riscv/rvd/s_fpclassify.c: Likewise. * sysdeps/riscv/rvd/s_isinf.c: Likewise. * sysdeps/riscv/rvd/s_isnan.c: Likewise. * sysdeps/riscv/rvd/s_issignaling.c: Likewise. * sysdeps/riscv/rvf/e_sqrtf.c: Likewise. * sysdeps/riscv/rvf/fclrexcpt.c: Likewise. * sysdeps/riscv/rvf/fegetenv.c: Likewise. * sysdeps/riscv/rvf/fegetmode.c: Likewise. * sysdeps/riscv/rvf/fegetround.c: Likewise. * sysdeps/riscv/rvf/feholdexcpt.c: Likewise. * sysdeps/riscv/rvf/fesetenv.c: Likewise. * sysdeps/riscv/rvf/fesetexcept.c: Likewise. * sysdeps/riscv/rvf/fesetmode.c: Likewise. * sysdeps/riscv/rvf/fesetround.c: Likewise. * sysdeps/riscv/rvf/feupdateenv.c: Likewise. * sysdeps/riscv/rvf/fgetexcptflg.c: Likewise. * sysdeps/riscv/rvf/fraiseexcpt.c: Likewise. * sysdeps/riscv/rvf/fsetexcptflg.c: Likewise. * sysdeps/riscv/rvf/ftestexcept.c: Likewise. * sysdeps/riscv/rvf/get-rounding-mode.h: Likewise. * sysdeps/riscv/rvf/math_private.h: Likewise. * sysdeps/riscv/rvf/s_ceilf.c: Likewise. * sysdeps/riscv/rvf/s_copysignf.c: Likewise. * sysdeps/riscv/rvf/s_finitef.c: Likewise. * sysdeps/riscv/rvf/s_floorf.c: Likewise. * sysdeps/riscv/rvf/s_fmaf.c: Likewise. * sysdeps/riscv/rvf/s_fmaxf.c: Likewise. * sysdeps/riscv/rvf/s_fminf.c: Likewise. * sysdeps/riscv/rvf/s_fpclassifyf.c: Likewise. * sysdeps/riscv/rvf/s_isinff.c: Likewise. * sysdeps/riscv/rvf/s_isnanf.c: Likewise. * sysdeps/riscv/rvf/s_issignalingf.c: Likewise. * sysdeps/riscv/rvf/s_nearbyintf.c: Likewise. * sysdeps/riscv/rvf/s_rintf.c: Likewise. * sysdeps/riscv/rvf/s_roundevenf.c: Likewise. * sysdeps/riscv/rvf/s_roundf.c: Likewise. * sysdeps/riscv/rvf/s_truncf.c: Likewise.
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#include <fenv.h>
#include <fpu_control.h>
#include <get-rounding-mode.h>
static __always_inline int
riscv_getround (void)
{
return get_rounding_mode ();
}
static __always_inline void
riscv_setround (int rm)
{
asm volatile ("fsrm %z0" : : "rJ" (rm));
}
static __always_inline int
riscv_getflags (void)
{
int flags;
asm volatile ("frflags %0" : "=r" (flags));
return flags;
}
static __always_inline void
riscv_setflags (int flags)
{
asm volatile ("fsflags %z0" : : "rJ" (flags));
}
static __always_inline void
libc_feholdexcept_riscv (fenv_t *envp)
{
asm volatile ("csrrc %0, fcsr, %1" : "=r" (*envp) : "i" (FE_ALL_EXCEPT));
}
#define libc_feholdexcept libc_feholdexcept_riscv
#define libc_feholdexceptf libc_feholdexcept_riscv
#define libc_feholdexceptl libc_feholdexcept_riscv
static __always_inline void
libc_fesetround_riscv (int round)
{
riscv_setround (round);
}
#define libc_fesetround libc_fesetround_riscv
#define libc_fesetroundf libc_fesetround_riscv
#define libc_fesetroundl libc_fesetround_riscv
static __always_inline void
libc_feholdexcept_setround_riscv (fenv_t *envp, int round)
{
libc_feholdexcept_riscv (envp);
libc_fesetround_riscv (round);
RISC-V: Hard Float Support This patch contains hardware floating-point support for the RISC-V ISA. While we currently only support hard-float systems with both the F and D extensions, I've left the F-specific code split out into seperate folders in order to ease adding support for F-only and RV32I-based systems in the future. I gave this a quick once-over and believe I've removed all the code that implements RV32IF, RV32IFD, and RV64IF targets. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/rv64/rvd/s_ceil.c: New file. * sysdeps/riscv/rv64/rvd/s_floor.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_nearbyint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_rint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_round.c: Likewise. * sysdeps/riscv/rv64/rvd/s_roundeven.c: Likewise. * sysdeps/riscv/rv64/rvd/s_trunc.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llroundf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lroundf.c: Likewise. * sysdeps/riscv/rvd/e_sqrt.c: Likewise. * sysdeps/riscv/rvd/s_copysign.c: Likewise. * sysdeps/riscv/rvd/s_finite.c: Likewise. * sysdeps/riscv/rvd/s_fma.c: Likewise. * sysdeps/riscv/rvd/s_fmax.c: Likewise. * sysdeps/riscv/rvd/s_fmin.c: Likewise. * sysdeps/riscv/rvd/s_fpclassify.c: Likewise. * sysdeps/riscv/rvd/s_isinf.c: Likewise. * sysdeps/riscv/rvd/s_isnan.c: Likewise. * sysdeps/riscv/rvd/s_issignaling.c: Likewise. * sysdeps/riscv/rvf/e_sqrtf.c: Likewise. * sysdeps/riscv/rvf/fclrexcpt.c: Likewise. * sysdeps/riscv/rvf/fegetenv.c: Likewise. * sysdeps/riscv/rvf/fegetmode.c: Likewise. * sysdeps/riscv/rvf/fegetround.c: Likewise. * sysdeps/riscv/rvf/feholdexcpt.c: Likewise. * sysdeps/riscv/rvf/fesetenv.c: Likewise. * sysdeps/riscv/rvf/fesetexcept.c: Likewise. * sysdeps/riscv/rvf/fesetmode.c: Likewise. * sysdeps/riscv/rvf/fesetround.c: Likewise. * sysdeps/riscv/rvf/feupdateenv.c: Likewise. * sysdeps/riscv/rvf/fgetexcptflg.c: Likewise. * sysdeps/riscv/rvf/fraiseexcpt.c: Likewise. * sysdeps/riscv/rvf/fsetexcptflg.c: Likewise. * sysdeps/riscv/rvf/ftestexcept.c: Likewise. * sysdeps/riscv/rvf/get-rounding-mode.h: Likewise. * sysdeps/riscv/rvf/math_private.h: Likewise. * sysdeps/riscv/rvf/s_ceilf.c: Likewise. * sysdeps/riscv/rvf/s_copysignf.c: Likewise. * sysdeps/riscv/rvf/s_finitef.c: Likewise. * sysdeps/riscv/rvf/s_floorf.c: Likewise. * sysdeps/riscv/rvf/s_fmaf.c: Likewise. * sysdeps/riscv/rvf/s_fmaxf.c: Likewise. * sysdeps/riscv/rvf/s_fminf.c: Likewise. * sysdeps/riscv/rvf/s_fpclassifyf.c: Likewise. * sysdeps/riscv/rvf/s_isinff.c: Likewise. * sysdeps/riscv/rvf/s_isnanf.c: Likewise. * sysdeps/riscv/rvf/s_issignalingf.c: Likewise. * sysdeps/riscv/rvf/s_nearbyintf.c: Likewise. * sysdeps/riscv/rvf/s_rintf.c: Likewise. * sysdeps/riscv/rvf/s_roundevenf.c: Likewise. * sysdeps/riscv/rvf/s_roundf.c: Likewise. * sysdeps/riscv/rvf/s_truncf.c: Likewise.
2018-01-29 17:27:10 +00:00
}
#define libc_feholdexcept_setround libc_feholdexcept_setround_riscv
#define libc_feholdexcept_setroundf libc_feholdexcept_setround_riscv
#define libc_feholdexcept_setroundl libc_feholdexcept_setround_riscv
static __always_inline int
libc_fetestexcept_riscv (int ex)
{
return riscv_getflags () & ex;
}
#define libc_fetestexcept libc_fetestexcept_riscv
#define libc_fetestexceptf libc_fetestexcept_riscv
#define libc_fetestexceptl libc_fetestexcept_riscv
static __always_inline void
libc_fesetenv_riscv (const fenv_t *envp)
{
long int env = (long int) envp - (long int) FE_DFL_ENV;
if (env != 0)
env = *envp;
_FPU_SETCW (env);
}
#define libc_fesetenv libc_fesetenv_riscv
#define libc_fesetenvf libc_fesetenv_riscv
#define libc_fesetenvl libc_fesetenv_riscv
#define libc_feresetround_noex libc_fesetenv_riscv
#define libc_feresetround_noexf libc_fesetenv_riscv
#define libc_feresetround_noexl libc_fesetenv_riscv
static __always_inline int
libc_feupdateenv_test_riscv (const fenv_t *envp, int ex)
{
fenv_t env = *envp;
int flags = riscv_getflags ();
asm volatile ("csrw fcsr, %z0" : : "rJ" (env | flags));
return flags & ex;
}
#define libc_feupdateenv_test libc_feupdateenv_test_riscv
#define libc_feupdateenv_testf libc_feupdateenv_test_riscv
#define libc_feupdateenv_testl libc_feupdateenv_test_riscv
static __always_inline void
libc_feupdateenv_riscv (const fenv_t *envp)
{
_FPU_SETCW (*envp | riscv_getflags ());
}
#define libc_feupdateenv libc_feupdateenv_riscv
#define libc_feupdateenvf libc_feupdateenv_riscv
#define libc_feupdateenvl libc_feupdateenv_riscv
static __always_inline void
libc_feholdsetround_riscv (fenv_t *envp, int round)
{
/* Note this implementation makes an improperly-formatted fenv_t and
so should only be used in conjunction with libc_feresetround. */
int old_round;
asm volatile ("csrrw %0, frm, %z1" : "=r" (old_round) : "rJ" (round));
*envp = old_round;
}
#define libc_feholdsetround libc_feholdsetround_riscv
#define libc_feholdsetroundf libc_feholdsetround_riscv
#define libc_feholdsetroundl libc_feholdsetround_riscv
static __always_inline void
libc_feresetround_riscv (fenv_t *envp)
{
/* Note this implementation takes an improperly-formatted fenv_t and
so should only be used in conjunction with libc_feholdsetround. */
riscv_setround (*envp);
}
#define libc_feresetround libc_feresetround_riscv
#define libc_feresetroundf libc_feresetround_riscv
#define libc_feresetroundl libc_feresetround_riscv
Split fenv_private.h out of math_private.h more consistently. On some architectures, the parts of math_private.h relating to the floating-point environment are in a separate file fenv_private.h included from math_private.h. As this is purely an architecture-specific convention used by several architectures, however, all such architectures still need their own math_private.h, even if it has nothing to do beyond #include <fenv_private.h> and peculiarity of including the i386 file directly instead of having a shared file in sysdeps/x86. This patch makes the fenv_private.h name an architecture-independent convention in glibc. The include of fenv_private.h from math_private.h becomes architecture-independent (until callers are updated to include fenv_private.h directly so the include from math_private.h is no longer needed). Some architecture math_private.h headers are removed if no longer needed, or renamed to fenv_private.h if all they define belongs in that header; architecture fenv_private.h headers now do require #include_next <fenv_private.h>. The i386 fenv_private.h file moves to sysdeps/x86/fpu/ to reflect how it is actually shared with x86_64. The generic math_private.h gets a new include of <stdbool.h>, as needed for bool in some prototypes in that header (previously that was indirectly included via include/fenv.h, which now only gets included too late in math_private.h, after those prototypes). Tested for x86_64 and x86, and tested with build-many-glibcs.py that installed stripped shared libraries are unchanged by the patch. * sysdeps/aarch64/fpu/fenv_private.h: New file. Based on .... * sysdeps/aarch64/fpu/math_private.h: ... this file. All contents moved to fenv_private.h except for ... (TOINT_INTRINSICS): Kept in math_private.h. (roundtoint): Likewise. (converttoint): Likewise. * sysdeps/arm/fenv_private.h: Change multiple-include guard to [ARM_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/arm/math_private.h: Remove. * sysdeps/generic/fenv_private.h: New file. Contents moved from .... * sysdeps/generic/math_private.h: ... this file. Include <stdbool.h>. Do not include <fenv.h> or <get-rounding-mode.h>. Include <fenv_private.h>. Remove functions and macros moved to fenv_private.h. * sysdeps/i386/fpu/math_private.h: Remove. * sysdeps/mips/math_private.h: Move to .... * sysdeps/mips/fpu/fenv_private.h: ... here. Change multiple-include guard to [MIPS_FENV_PRIVATE_H]. Remove [__mips_hard_float] conditional. Include next <fenv_private.h>. * sysdeps/powerpc/fpu/fenv_private.h: Change multiple-include guard to [POWERPC_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/powerpc/fpu/math_private.h: Do not include <fenv_private.h>. * sysdeps/riscv/rvf/math_private.h: Move to .... * sysdeps/riscv/rvf/fenv_private.h: ... here. Change multiple-include guard to [RISCV_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/sparc/fpu/fenv_private.h: Change multiple-include guard to [SPARC_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/sparc/fpu/math_private.h: Remove. * sysdeps/i386/fpu/fenv_private.h: Move to .... * sysdeps/x86/fpu/fenv_private.h: ... here. Change multiple-include guard to [X86_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/x86_64/fpu/math_private.h: Do not include <sysdeps/i386/fpu/fenv_private.h>.
2018-08-28 20:48:49 +00:00
#include_next <fenv_private.h>
RISC-V: Hard Float Support This patch contains hardware floating-point support for the RISC-V ISA. While we currently only support hard-float systems with both the F and D extensions, I've left the F-specific code split out into seperate folders in order to ease adding support for F-only and RV32I-based systems in the future. I gave this a quick once-over and believe I've removed all the code that implements RV32IF, RV32IFD, and RV64IF targets. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/rv64/rvd/s_ceil.c: New file. * sysdeps/riscv/rv64/rvd/s_floor.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_nearbyint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_rint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_round.c: Likewise. * sysdeps/riscv/rv64/rvd/s_roundeven.c: Likewise. * sysdeps/riscv/rv64/rvd/s_trunc.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llroundf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lroundf.c: Likewise. * sysdeps/riscv/rvd/e_sqrt.c: Likewise. * sysdeps/riscv/rvd/s_copysign.c: Likewise. * sysdeps/riscv/rvd/s_finite.c: Likewise. * sysdeps/riscv/rvd/s_fma.c: Likewise. * sysdeps/riscv/rvd/s_fmax.c: Likewise. * sysdeps/riscv/rvd/s_fmin.c: Likewise. * sysdeps/riscv/rvd/s_fpclassify.c: Likewise. * sysdeps/riscv/rvd/s_isinf.c: Likewise. * sysdeps/riscv/rvd/s_isnan.c: Likewise. * sysdeps/riscv/rvd/s_issignaling.c: Likewise. * sysdeps/riscv/rvf/e_sqrtf.c: Likewise. * sysdeps/riscv/rvf/fclrexcpt.c: Likewise. * sysdeps/riscv/rvf/fegetenv.c: Likewise. * sysdeps/riscv/rvf/fegetmode.c: Likewise. * sysdeps/riscv/rvf/fegetround.c: Likewise. * sysdeps/riscv/rvf/feholdexcpt.c: Likewise. * sysdeps/riscv/rvf/fesetenv.c: Likewise. * sysdeps/riscv/rvf/fesetexcept.c: Likewise. * sysdeps/riscv/rvf/fesetmode.c: Likewise. * sysdeps/riscv/rvf/fesetround.c: Likewise. * sysdeps/riscv/rvf/feupdateenv.c: Likewise. * sysdeps/riscv/rvf/fgetexcptflg.c: Likewise. * sysdeps/riscv/rvf/fraiseexcpt.c: Likewise. * sysdeps/riscv/rvf/fsetexcptflg.c: Likewise. * sysdeps/riscv/rvf/ftestexcept.c: Likewise. * sysdeps/riscv/rvf/get-rounding-mode.h: Likewise. * sysdeps/riscv/rvf/math_private.h: Likewise. * sysdeps/riscv/rvf/s_ceilf.c: Likewise. * sysdeps/riscv/rvf/s_copysignf.c: Likewise. * sysdeps/riscv/rvf/s_finitef.c: Likewise. * sysdeps/riscv/rvf/s_floorf.c: Likewise. * sysdeps/riscv/rvf/s_fmaf.c: Likewise. * sysdeps/riscv/rvf/s_fmaxf.c: Likewise. * sysdeps/riscv/rvf/s_fminf.c: Likewise. * sysdeps/riscv/rvf/s_fpclassifyf.c: Likewise. * sysdeps/riscv/rvf/s_isinff.c: Likewise. * sysdeps/riscv/rvf/s_isnanf.c: Likewise. * sysdeps/riscv/rvf/s_issignalingf.c: Likewise. * sysdeps/riscv/rvf/s_nearbyintf.c: Likewise. * sysdeps/riscv/rvf/s_rintf.c: Likewise. * sysdeps/riscv/rvf/s_roundevenf.c: Likewise. * sysdeps/riscv/rvf/s_roundf.c: Likewise. * sysdeps/riscv/rvf/s_truncf.c: Likewise.
2018-01-29 17:27:10 +00:00
#endif