2011-10-07 15:49:10 +00:00
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/* fast SSE2 memrchr with 64 byte loop and pmaxub instruction using
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2022-01-01 18:54:23 +00:00
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Copyright (C) 2011-2022 Free Software Foundation, Inc.
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2011-10-07 15:49:10 +00:00
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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2012-02-09 23:18:22 +00:00
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License along with the GNU C Library; if not, see
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Prefer https to http for gnu.org and fsf.org URLs
Also, change sources.redhat.com to sourceware.org.
This patch was automatically generated by running the following shell
script, which uses GNU sed, and which avoids modifying files imported
from upstream:
sed -ri '
s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g
s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g
' \
$(find $(git ls-files) -prune -type f \
! -name '*.po' \
! -name 'ChangeLog*' \
! -path COPYING ! -path COPYING.LIB \
! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \
! -path manual/texinfo.tex ! -path scripts/config.guess \
! -path scripts/config.sub ! -path scripts/install-sh \
! -path scripts/mkinstalldirs ! -path scripts/move-if-change \
! -path INSTALL ! -path locale/programs/charmap-kw.h \
! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \
! '(' -name configure \
-execdir test -f configure.ac -o -f configure.in ';' ')' \
! '(' -name preconfigure \
-execdir test -f preconfigure.ac ';' ')' \
-print)
and then by running 'make dist-prepare' to regenerate files built
from the altered files, and then executing the following to cleanup:
chmod a+x sysdeps/unix/sysv/linux/riscv/configure
# Omit irrelevant whitespace and comment-only changes,
# perhaps from a slightly-different Autoconf version.
git checkout -f \
sysdeps/csky/configure \
sysdeps/hppa/configure \
sysdeps/riscv/configure \
sysdeps/unix/sysv/linux/csky/configure
# Omit changes that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines
git checkout -f \
sysdeps/powerpc/powerpc64/ppc-mcount.S \
sysdeps/unix/sysv/linux/s390/s390-64/syscall.S
# Omit change that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline
git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
2019-09-07 05:40:42 +00:00
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<https://www.gnu.org/licenses/>. */
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2011-10-07 15:49:10 +00:00
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#include <sysdep.h>
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2022-06-07 04:11:30 +00:00
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#define VEC_SIZE 16
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#define PAGE_SIZE 4096
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2011-10-07 15:49:10 +00:00
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.text
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2022-06-07 04:11:30 +00:00
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ENTRY_P2ALIGN(__memrchr, 6)
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#ifdef __ILP32__
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/* Clear upper bits. */
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mov %RDX_LP, %RDX_LP
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#endif
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movd %esi, %xmm0
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/* Get end pointer. */
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leaq (%rdx, %rdi), %rcx
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punpcklbw %xmm0, %xmm0
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punpcklwd %xmm0, %xmm0
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pshufd $0, %xmm0, %xmm0
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/* Check if we can load 1x VEC without cross a page. */
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testl $(PAGE_SIZE - VEC_SIZE), %ecx
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jz L(page_cross)
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/* NB: This load happens regardless of whether rdx (len) is zero. Since
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it doesn't cross a page and the standard gurantees any pointer have
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at least one-valid byte this load must be safe. For the entire
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history of the x86 memrchr implementation this has been possible so
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no code "should" be relying on a zero-length check before this load.
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The zero-length check is moved to the page cross case because it is
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1) pretty cold and including it pushes the hot case len <= VEC_SIZE
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into 2-cache lines. */
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movups -(VEC_SIZE)(%rcx), %xmm1
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pcmpeqb %xmm0, %xmm1
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pmovmskb %xmm1, %eax
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subq $VEC_SIZE, %rdx
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ja L(more_1x_vec)
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L(ret_vec_x0_test):
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/* Zero-flag set if eax (src) is zero. Destination unchanged if src is
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zero. */
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bsrl %eax, %eax
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jz L(ret_0)
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/* Check if the CHAR match is in bounds. Need to truly zero `eax` here
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if out of bounds. */
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addl %edx, %eax
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jl L(zero_0)
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/* Since we subtracted VEC_SIZE from rdx earlier we can just add to base
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ptr. */
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addq %rdi, %rax
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L(ret_0):
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2011-10-07 15:49:10 +00:00
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ret
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2022-06-07 04:11:30 +00:00
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.p2align 4,, 5
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L(ret_vec_x0):
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bsrl %eax, %eax
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leaq -(VEC_SIZE)(%rcx, %rax), %rax
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2011-10-07 15:49:10 +00:00
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ret
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2022-06-07 04:11:30 +00:00
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.p2align 4,, 2
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L(zero_0):
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xorl %eax, %eax
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2011-10-07 15:49:10 +00:00
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ret
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2022-06-07 04:11:30 +00:00
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.p2align 4,, 8
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L(more_1x_vec):
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testl %eax, %eax
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jnz L(ret_vec_x0)
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/* Align rcx (pointer to string). */
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decq %rcx
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andq $-VEC_SIZE, %rcx
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movq %rcx, %rdx
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/* NB: We could consistenyl save 1-byte in this pattern with `movaps
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%xmm0, %xmm1; pcmpeq IMM8(r), %xmm1; ...`. The reason against it is
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it adds more frontend uops (even if the moves can be eliminated) and
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some percentage of the time actual backend uops. */
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movaps -(VEC_SIZE)(%rcx), %xmm1
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pcmpeqb %xmm0, %xmm1
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subq %rdi, %rdx
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pmovmskb %xmm1, %eax
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cmpq $(VEC_SIZE * 2), %rdx
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ja L(more_2x_vec)
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L(last_2x_vec):
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subl $VEC_SIZE, %edx
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jbe L(ret_vec_x0_test)
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testl %eax, %eax
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jnz L(ret_vec_x0)
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movaps -(VEC_SIZE * 2)(%rcx), %xmm1
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pcmpeqb %xmm0, %xmm1
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pmovmskb %xmm1, %eax
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subl $VEC_SIZE, %edx
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bsrl %eax, %eax
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jz L(ret_1)
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addl %edx, %eax
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jl L(zero_0)
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addq %rdi, %rax
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L(ret_1):
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2011-10-07 15:49:10 +00:00
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ret
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2022-06-07 04:11:30 +00:00
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/* Don't align. Otherwise lose 2-byte encoding in jump to L(page_cross)
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causes the hot pause (length <= VEC_SIZE) to span multiple cache
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lines. Naturally aligned % 16 to 8-bytes. */
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L(page_cross):
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/* Zero length check. */
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testq %rdx, %rdx
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jz L(zero_0)
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leaq -1(%rcx), %r8
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andq $-(VEC_SIZE), %r8
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movaps (%r8), %xmm1
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pcmpeqb %xmm0, %xmm1
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pmovmskb %xmm1, %esi
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/* Shift out negative alignment (because we are starting from endptr and
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working backwards). */
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negl %ecx
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/* 32-bit shift but VEC_SIZE=16 so need to mask the shift count
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explicitly. */
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andl $(VEC_SIZE - 1), %ecx
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shl %cl, %esi
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movzwl %si, %eax
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leaq (%rdi, %rdx), %rcx
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cmpq %rdi, %r8
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ja L(more_1x_vec)
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subl $VEC_SIZE, %edx
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bsrl %eax, %eax
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jz L(ret_2)
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addl %edx, %eax
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jl L(zero_1)
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addq %rdi, %rax
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L(ret_2):
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2011-10-07 15:49:10 +00:00
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ret
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2022-06-07 04:11:30 +00:00
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/* Fits in aliging bytes. */
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L(zero_1):
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xorl %eax, %eax
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2011-10-07 15:49:10 +00:00
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ret
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2022-06-07 04:11:30 +00:00
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.p2align 4,, 5
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L(ret_vec_x1):
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bsrl %eax, %eax
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leaq -(VEC_SIZE * 2)(%rcx, %rax), %rax
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2011-10-07 15:49:10 +00:00
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ret
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2022-06-07 04:11:30 +00:00
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.p2align 4,, 8
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L(more_2x_vec):
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testl %eax, %eax
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jnz L(ret_vec_x0)
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2011-10-07 15:49:10 +00:00
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2022-06-07 04:11:30 +00:00
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movaps -(VEC_SIZE * 2)(%rcx), %xmm1
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pcmpeqb %xmm0, %xmm1
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pmovmskb %xmm1, %eax
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testl %eax, %eax
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jnz L(ret_vec_x1)
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2011-10-07 15:49:10 +00:00
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2022-06-07 04:11:30 +00:00
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movaps -(VEC_SIZE * 3)(%rcx), %xmm1
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pcmpeqb %xmm0, %xmm1
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pmovmskb %xmm1, %eax
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2011-10-13 11:33:58 +00:00
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2022-06-07 04:11:30 +00:00
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subq $(VEC_SIZE * 4), %rdx
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ja L(more_4x_vec)
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2011-10-07 15:49:10 +00:00
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2022-06-07 04:11:30 +00:00
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addl $(VEC_SIZE), %edx
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jle L(ret_vec_x2_test)
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2011-10-07 15:49:10 +00:00
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2022-06-07 04:11:30 +00:00
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L(last_vec):
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testl %eax, %eax
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jnz L(ret_vec_x2)
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2011-10-07 15:49:10 +00:00
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2022-06-07 04:11:30 +00:00
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movaps -(VEC_SIZE * 4)(%rcx), %xmm1
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pcmpeqb %xmm0, %xmm1
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pmovmskb %xmm1, %eax
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2011-10-07 15:49:10 +00:00
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2022-06-07 04:11:30 +00:00
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subl $(VEC_SIZE), %edx
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bsrl %eax, %eax
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jz L(ret_3)
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addl %edx, %eax
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jl L(zero_2)
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addq %rdi, %rax
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L(ret_3):
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2011-10-07 15:49:10 +00:00
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ret
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2022-06-07 04:11:30 +00:00
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.p2align 4,, 6
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L(ret_vec_x2_test):
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bsrl %eax, %eax
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jz L(zero_2)
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addl %edx, %eax
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jl L(zero_2)
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addq %rdi, %rax
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2011-10-07 15:49:10 +00:00
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ret
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2022-06-07 04:11:30 +00:00
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L(zero_2):
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xorl %eax, %eax
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ret
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2011-10-07 15:49:10 +00:00
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2022-06-07 04:11:30 +00:00
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.p2align 4,, 5
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L(ret_vec_x2):
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bsrl %eax, %eax
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leaq -(VEC_SIZE * 3)(%rcx, %rax), %rax
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ret
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2011-10-07 15:49:10 +00:00
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2022-06-07 04:11:30 +00:00
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.p2align 4,, 5
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L(ret_vec_x3):
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bsrl %eax, %eax
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leaq -(VEC_SIZE * 4)(%rcx, %rax), %rax
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ret
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2011-10-07 15:49:10 +00:00
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2022-06-07 04:11:30 +00:00
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.p2align 4,, 8
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L(more_4x_vec):
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testl %eax, %eax
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jnz L(ret_vec_x2)
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movaps -(VEC_SIZE * 4)(%rcx), %xmm1
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pcmpeqb %xmm0, %xmm1
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pmovmskb %xmm1, %eax
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testl %eax, %eax
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jnz L(ret_vec_x3)
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addq $-(VEC_SIZE * 4), %rcx
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cmpq $(VEC_SIZE * 4), %rdx
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jbe L(last_4x_vec)
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/* Offset everything by 4x VEC_SIZE here to save a few bytes at the end
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keeping the code from spilling to the next cache line. */
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addq $(VEC_SIZE * 4 - 1), %rcx
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andq $-(VEC_SIZE * 4), %rcx
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leaq (VEC_SIZE * 4)(%rdi), %rdx
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andq $-(VEC_SIZE * 4), %rdx
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.p2align 4,, 11
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L(loop_4x_vec):
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movaps (VEC_SIZE * -1)(%rcx), %xmm1
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movaps (VEC_SIZE * -2)(%rcx), %xmm2
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movaps (VEC_SIZE * -3)(%rcx), %xmm3
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movaps (VEC_SIZE * -4)(%rcx), %xmm4
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pcmpeqb %xmm0, %xmm1
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pcmpeqb %xmm0, %xmm2
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pcmpeqb %xmm0, %xmm3
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pcmpeqb %xmm0, %xmm4
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por %xmm1, %xmm2
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por %xmm3, %xmm4
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por %xmm2, %xmm4
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pmovmskb %xmm4, %esi
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testl %esi, %esi
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jnz L(loop_end)
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addq $-(VEC_SIZE * 4), %rcx
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cmpq %rdx, %rcx
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jne L(loop_4x_vec)
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subl %edi, %edx
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/* Ends up being 1-byte nop. */
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.p2align 4,, 2
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L(last_4x_vec):
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movaps -(VEC_SIZE)(%rcx), %xmm1
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pcmpeqb %xmm0, %xmm1
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pmovmskb %xmm1, %eax
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cmpl $(VEC_SIZE * 2), %edx
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jbe L(last_2x_vec)
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testl %eax, %eax
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jnz L(ret_vec_x0)
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movaps -(VEC_SIZE * 2)(%rcx), %xmm1
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pcmpeqb %xmm0, %xmm1
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pmovmskb %xmm1, %eax
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testl %eax, %eax
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jnz L(ret_vec_end)
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movaps -(VEC_SIZE * 3)(%rcx), %xmm1
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pcmpeqb %xmm0, %xmm1
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|
|
|
pmovmskb %xmm1, %eax
|
|
|
|
|
|
|
|
subl $(VEC_SIZE * 3), %edx
|
|
|
|
ja L(last_vec)
|
|
|
|
bsrl %eax, %eax
|
|
|
|
jz L(ret_4)
|
|
|
|
addl %edx, %eax
|
|
|
|
jl L(zero_3)
|
|
|
|
addq %rdi, %rax
|
|
|
|
L(ret_4):
|
2011-10-07 15:49:10 +00:00
|
|
|
ret
|
|
|
|
|
2022-06-07 04:11:30 +00:00
|
|
|
/* Ends up being 1-byte nop. */
|
|
|
|
.p2align 4,, 3
|
|
|
|
L(loop_end):
|
|
|
|
pmovmskb %xmm1, %eax
|
|
|
|
sall $16, %eax
|
|
|
|
jnz L(ret_vec_end)
|
|
|
|
|
|
|
|
pmovmskb %xmm2, %eax
|
|
|
|
testl %eax, %eax
|
|
|
|
jnz L(ret_vec_end)
|
|
|
|
|
|
|
|
pmovmskb %xmm3, %eax
|
|
|
|
/* Combine last 2 VEC matches. If ecx (VEC3) is zero (no CHAR in VEC3)
|
|
|
|
then it won't affect the result in esi (VEC4). If ecx is non-zero
|
|
|
|
then CHAR in VEC3 and bsrq will use that position. */
|
|
|
|
sall $16, %eax
|
|
|
|
orl %esi, %eax
|
|
|
|
bsrl %eax, %eax
|
|
|
|
leaq -(VEC_SIZE * 4)(%rcx, %rax), %rax
|
2011-10-07 15:49:10 +00:00
|
|
|
ret
|
|
|
|
|
2022-06-07 04:11:30 +00:00
|
|
|
L(ret_vec_end):
|
|
|
|
bsrl %eax, %eax
|
|
|
|
leaq (VEC_SIZE * -2)(%rax, %rcx), %rax
|
|
|
|
ret
|
|
|
|
/* Use in L(last_4x_vec). In the same cache line. This is just a spare
|
|
|
|
aligning bytes. */
|
|
|
|
L(zero_3):
|
|
|
|
xorl %eax, %eax
|
|
|
|
ret
|
|
|
|
/* 2-bytes from next cache line. */
|
|
|
|
END(__memrchr)
|
2014-12-16 18:31:31 +00:00
|
|
|
weak_alias (__memrchr, memrchr)
|