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34 lines
1.1 KiB
Plaintext
34 lines
1.1 KiB
Plaintext
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/*
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* @(#)sparc.gcc 10.1 (Sleepycat) 4/12/97
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*
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* The ldstub instruction takes the location specified by its first argument
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* (a register containing a memory address) and loads its contents into its
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* second argument (a register) and atomically sets the contents the location
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* specified by its first argument to a byte of 1s. (The value in the second
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* argument is never read, but only overwritten.)
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*
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* The membar instructions are needed to ensure that writes to the lock are
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* correctly ordered with writes that occur later in the instruction stream.
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*
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* For gcc/sparc, 0 is clear, 1 is set.
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*/
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#if defined(__sparcv9__)
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Does the following code need membar instructions for V9 processors?
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#endif
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#define TSL_SET(tsl) ({ \
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register tsl_t *__l = (tsl); \
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register tsl_t __r; \
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__asm__ volatile \
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("ldstub [%1],%0" \
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: "=r"( __r) : "r" (__l)); \
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!__r; \
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})
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#define TSL_UNSET(tsl) ({ \
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register tsl_t *__l = (tsl); \
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__asm__ volatile ("stb %%g0,[%0]" : : "r" (__l)); \
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})
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#define TSL_INIT(tsl) TSL_UNSET(tsl)
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