glibc/sysdeps/powerpc/powerpc64/power7/mempcpy.S

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/* Optimized mempcpy implementation for POWER7.
Copyright (C) 2010-2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
Prefer https to http for gnu.org and fsf.org URLs Also, change sources.redhat.com to sourceware.org. This patch was automatically generated by running the following shell script, which uses GNU sed, and which avoids modifying files imported from upstream: sed -ri ' s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g ' \ $(find $(git ls-files) -prune -type f \ ! -name '*.po' \ ! -name 'ChangeLog*' \ ! -path COPYING ! -path COPYING.LIB \ ! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \ ! -path manual/texinfo.tex ! -path scripts/config.guess \ ! -path scripts/config.sub ! -path scripts/install-sh \ ! -path scripts/mkinstalldirs ! -path scripts/move-if-change \ ! -path INSTALL ! -path locale/programs/charmap-kw.h \ ! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \ ! '(' -name configure \ -execdir test -f configure.ac -o -f configure.in ';' ')' \ ! '(' -name preconfigure \ -execdir test -f preconfigure.ac ';' ')' \ -print) and then by running 'make dist-prepare' to regenerate files built from the altered files, and then executing the following to cleanup: chmod a+x sysdeps/unix/sysv/linux/riscv/configure # Omit irrelevant whitespace and comment-only changes, # perhaps from a slightly-different Autoconf version. git checkout -f \ sysdeps/csky/configure \ sysdeps/hppa/configure \ sysdeps/riscv/configure \ sysdeps/unix/sysv/linux/csky/configure # Omit changes that caused a pre-commit check to fail like this: # remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines git checkout -f \ sysdeps/powerpc/powerpc64/ppc-mcount.S \ sysdeps/unix/sysv/linux/s390/s390-64/syscall.S # Omit change that caused a pre-commit check to fail like this: # remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
Do not use __ptr_t. sys/cdefs.h has a macro __ptr_t, which a few places in glibc use instead of void *. void * is a well-understood standard type for that purpose and in a post-C89 context there is no need for a macro for it; this patch changes those places to use void * directly instead. Unlike __long_double_t, __ptr_t is widely used outside glibc (or at least has many hits on codesearch.debian.net). I don't know how many of those uses would break if sys/cdefs.h ceased to define the macro, but there's enough risk that this patch leaves the definition and just removes the uses within glibc; removal of the definition can be considered separately if desired. Tested for x86_64, and with build-many-glibcs.py. * malloc/mcheck.c (old_free_hook): Use void * instead of __ptr_t. (old_malloc_hook): Likewise. (old_memalign_hook): Likewise. (old_realloc_hook): Likewise. (struct hdr): Likewise. (flood): Likewise. (freehook): Likewise. (mallochook): Likewise. (memalignhook): Likewise. (reallochook): Likewise. (mprobe): Likewise. * malloc/mtrace.c (mallwatch): Likewise. (tr_old_free_hook): Likewise. (tr_old_malloc_hook): Likewise. (tr_old_realloc_hook): Likewise. (tr_old_memalign_hook): Likewise. (tr_where): Likewise. (lock_and_info): Likewise. (tr_freehook): Likewise. (tr_mallochook): Likewise. (tr_reallochook): Likewise. (tr_memalignhook): Likewise. * misc/err.h [!__GNUC_VA_LIST] (__gnuc_va_list): Likewise. * misc/mmap.c (__mmap): Likewise. * misc/mmap64.c (__mmap64): Likewise. * misc/mprotect.c (__mprotect): Likewise. * misc/msync.c (msync): Likewise. * misc/munmap.c (__munmap): Likewise. * posix/posix_madvise.c (posix_madvise): Likewise. * socket/send.c (__send): Likewise. * socket/sendto.c (__sendto): Likewise. * socket/setsockopt.c (__setsockopt): Likewise. * string/memcmp.c (__ptr_t): Remove macro. (MEMCMP): Use void * instead of ptr_t. * string/memrchr.c (__ptr_t): Remove macro. (__memrchr): Use void * instead of ptr_t. * sysdeps/mach/hurd/dl-sysdep.c (__mmap): Likewise. * sysdeps/mach/hurd/mmap.c (__mmap): Likewise. * sysdeps/mach/hurd/mmap64.c (__mmap64): Likewise. * sysdeps/mach/mprotect.c (__mprotect): Likewise. * sysdeps/mach/msync.c (msync): Likewise. * sysdeps/mach/munmap.c (__munmap): Likewise. * sysdeps/mips/bits/setjmp.h (struct __jmp_buf_internal_tag): Likewise. * sysdeps/posix/getcwd.c (__getcwd): Likewise. * sysdeps/powerpc/powerpc32/memset.S (memset): Likewise. * sysdeps/powerpc/powerpc32/power4/memcpy.S (memcpy): Likewise. * sysdeps/powerpc/powerpc32/power4/memset.S (memset): Likewise. * sysdeps/powerpc/powerpc32/power6/memcpy.S (memcpy): Likewise. * sysdeps/powerpc/powerpc32/power6/memset.S (memset): Likewise. * sysdeps/powerpc/powerpc32/power7/memcpy.S (memcpy): Likewise. * sysdeps/powerpc/powerpc32/power7/mempcpy.S (__mempcpy): Likewise. * sysdeps/powerpc/powerpc32/power7/memset.S (memset): Likewise. * sysdeps/powerpc/powerpc64/memcpy.S (memcpy): Likewise. * sysdeps/powerpc/powerpc64/memset.S (memset): Likewise. * sysdeps/powerpc/powerpc64/power4/memcpy.S (memcpy): Likewise. * sysdeps/powerpc/powerpc64/power4/memset.S (memset): Likewise. * sysdeps/powerpc/powerpc64/power6/memcpy.S (memcpy): Likewise. * sysdeps/powerpc/powerpc64/power6/memset.S (memset): Likewise. * sysdeps/powerpc/powerpc64/power7/memcpy.S (memcpy): Likewise. * sysdeps/powerpc/powerpc64/power7/mempcpy.S (__mempcpy): Likewise. * sysdeps/powerpc/powerpc64/power7/memset.S (memset): Likewise. * sysdeps/powerpc/powerpc64/power8/memset.S (memset): Likewise. * sysdeps/tile/memcmp.c (__ptr_t): Remove macro. (MEMCMP): Use void * instead of ptr_t. * sysdeps/unix/sysv/linux/alpha/oldglob.c (old_glob_t): Likewise. * sysdeps/unix/sysv/linux/mmap.c (__mmap): Likewise.
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/* void * [r3] __mempcpy (void *dst [r3], void *src [r4], size_t len [r5]);
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Returns 'dst' + 'len'. */
#ifndef MEMPCPY
# define MEMPCPY __mempcpy
#endif
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.machine power7
PowerPC64 ENTRY_TOCLESS A number of functions in the sysdeps/powerpc/powerpc64/ tree don't use or change r2, yet declare a global entry that sets up r2. This patch fixes that problem, and consolidates the ENTRY and EALIGN macros. * sysdeps/powerpc/powerpc64/sysdep.h: Formatting. (NOPS, ENTRY_3): New macros. (ENTRY): Rewrite. (ENTRY_TOCLESS): Define. (EALIGN, EALIGN_W_0, EALIGN_W_1, EALIGN_W_2, EALIGN_W_4, EALIGN_W_5, EALIGN_W_6, EALIGN_W_7, EALIGN_W_8): Delete. * sysdeps/powerpc/powerpc64/a2/memcpy.S: Replace EALIGN with ENTRY. * sysdeps/powerpc/powerpc64/dl-trampoline.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floor.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_trunc.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_truncf.S: Likewise. * sysdeps/powerpc/powerpc64/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strstr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/e_expf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_cosf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_sinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcasestr.S: Likewise. * sysdeps/powerpc/powerpc64/addmul_1.S: Use ENTRY_TOCLESS. * sysdeps/powerpc/powerpc64/cell/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysignl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_fabsl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_llrintf.S: Likewise. * sysdeps/powerpc/powerpc64/lshift.S: Likewise. * sysdeps/powerpc/powerpc64/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/mul_1.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power4/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_floor.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_trunc.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_truncf.S: Likewise. * sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power7/add_n.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memmove.S: Likewise. * sysdeps/powerpc/powerpc64/power7/mempcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/rawmemchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcasecmp.S (strcasecmp_l): Likewise. * sysdeps/powerpc/powerpc64/power7/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strchrnul.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strnlen.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power8/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strncpy.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strnlen.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strspn.S: Likewise. * sysdeps/powerpc/powerpc64/power9/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power9/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/ppc-mcount.S: Store LR earlier. Don't add nop when SHARED. * sysdeps/powerpc/powerpc64/start.S: Fix comment. * sysdeps/powerpc/powerpc64/multiarch/strrchr-power8.S (ENTRY): Don't define. (ENTRY_TOCLESS): Define. * sysdeps/powerpc/powerpc32/sysdep.h (ENTRY_TOCLESS): Define. * sysdeps/powerpc/fpu/s_fma.S: Use ENTRY_TOCLESS. * sysdeps/powerpc/fpu/s_fmaf.S: Likewise.
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ENTRY_TOCLESS (MEMPCPY, 5)
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CALL_MCOUNT 3
cmpldi cr1,5,31
neg 0,3
std 3,-16(1)
std 31,-8(1)
cfi_offset(31,-8)
ble cr1,L(copy_LT_32) /* If move < 32 bytes use short move
code. */
andi. 11,3,7 /* Check alignment of DST. */
clrldi 10,4,61 /* Check alignment of SRC. */
cmpld cr6,10,11 /* SRC and DST alignments match? */
mr 12,4
mr 31,5
bne cr6,L(copy_GE_32_unaligned)
srdi 9,5,3 /* Number of full quadwords remaining. */
beq L(copy_GE_32_aligned_cont)
clrldi 0,0,61
mtcrf 0x01,0
subf 31,0,5
/* Get the SRC aligned to 8 bytes. */
1: bf 31,2f
lbz 6,0(12)
addi 12,12,1
stb 6,0(3)
addi 3,3,1
2: bf 30,4f
lhz 6,0(12)
addi 12,12,2
sth 6,0(3)
addi 3,3,2
4: bf 29,0f
lwz 6,0(12)
addi 12,12,4
stw 6,0(3)
addi 3,3,4
0:
clrldi 10,12,61 /* Check alignment of SRC again. */
srdi 9,31,3 /* Number of full doublewords remaining. */
L(copy_GE_32_aligned_cont):
clrldi 11,31,61
mtcrf 0x01,9
srdi 8,31,5
cmpldi cr1,9,4
cmpldi cr6,11,0
mr 11,12
/* Copy 1~3 doublewords so the main loop starts
at a multiple of 32 bytes. */
bf 30,1f
ld 6,0(12)
ld 7,8(12)
addi 11,12,16
mtctr 8
std 6,0(3)
std 7,8(3)
addi 10,3,16
bf 31,4f
ld 0,16(12)
std 0,16(3)
blt cr1,3f
addi 11,12,24
addi 10,3,24
b 4f
.align 4
1: /* Copy 1 doubleword and set the counter. */
mr 10,3
mtctr 8
bf 31,4f
ld 6,0(12)
addi 11,12,8
std 6,0(3)
addi 10,3,8
/* Main aligned copy loop. Copies 32-bytes at a time. */
.align 4
4:
ld 6,0(11)
ld 7,8(11)
ld 8,16(11)
ld 0,24(11)
addi 11,11,32
std 6,0(10)
std 7,8(10)
std 8,16(10)
std 0,24(10)
addi 10,10,32
bdnz 4b
3:
/* Check for tail bytes. */
rldicr 0,31,0,60
mtcrf 0x01,31
beq cr6,0f
.L9:
add 3,3,0
add 12,12,0
/* At this point we have a tail of 0-7 bytes and we know that the
destination is doubleword-aligned. */
4: /* Copy 4 bytes. */
bf 29,2f
lwz 6,0(12)
addi 12,12,4
stw 6,0(3)
addi 3,3,4
2: /* Copy 2 bytes. */
bf 30,1f
lhz 6,0(12)
addi 12,12,2
sth 6,0(3)
addi 3,3,2
1: /* Copy 1 byte. */
bf 31,0f
lbz 6,0(12)
stb 6,0(3)
0: /* Return DST + LEN pointer. */
ld 31,-8(1)
ld 3,-16(1)
add 3,3,5
blr
/* Handle copies of 0~31 bytes. */
.align 4
L(copy_LT_32):
cmpldi cr6,5,8
mr 12,4
mtcrf 0x01,5
ble cr6,L(copy_LE_8)
/* At least 9 bytes to go. */
neg 8,4
clrrdi 11,4,2
andi. 0,8,3
cmpldi cr1,5,16
mr 10,5
beq L(copy_LT_32_aligned)
/* Force 4-bytes alignment for SRC. */
mtocrf 0x01,0
subf 10,0,5
2: bf 30,1f
lhz 6,0(12)
addi 12,12,2
sth 6,0(3)
addi 3,3,2
1: bf 31,L(end_4bytes_alignment)
lbz 6,0(12)
addi 12,12,1
stb 6,0(3)
addi 3,3,1
.align 4
L(end_4bytes_alignment):
cmpldi cr1,10,16
mtcrf 0x01,10
L(copy_LT_32_aligned):
/* At least 6 bytes to go, and SRC is word-aligned. */
blt cr1,8f
/* Copy 16 bytes. */
lwz 6,0(12)
lwz 7,4(12)
stw 6,0(3)
lwz 8,8(12)
stw 7,4(3)
lwz 6,12(12)
addi 12,12,16
stw 8,8(3)
stw 6,12(3)
addi 3,3,16
8: /* Copy 8 bytes. */
bf 28,4f
lwz 6,0(12)
lwz 7,4(12)
addi 12,12,8
stw 6,0(3)
stw 7,4(3)
addi 3,3,8
4: /* Copy 4 bytes. */
bf 29,2f
lwz 6,0(12)
addi 12,12,4
stw 6,0(3)
addi 3,3,4
2: /* Copy 2-3 bytes. */
bf 30,1f
lhz 6,0(12)
sth 6,0(3)
bf 31,0f
lbz 7,2(12)
stb 7,2(3)
ld 3,-16(1)
add 3,3,5
blr
.align 4
1: /* Copy 1 byte. */
bf 31,0f
lbz 6,0(12)
stb 6,0(3)
0: /* Return DST + LEN pointer. */
ld 3,-16(1)
add 3,3,5
blr
/* Handles copies of 0~8 bytes. */
.align 4
L(copy_LE_8):
bne cr6,4f
/* Though we could've used ld/std here, they are still
slow for unaligned cases. */
lwz 6,0(4)
lwz 7,4(4)
stw 6,0(3)
stw 7,4(3)
ld 3,-16(1) /* Return DST + LEN pointer. */
add 3,3,5
blr
.align 4
4: /* Copies 4~7 bytes. */
bf 29,2b
lwz 6,0(4)
stw 6,0(3)
bf 30,5f
lhz 7,4(4)
sth 7,4(3)
bf 31,0f
lbz 8,6(4)
stb 8,6(3)
ld 3,-16(1)
add 3,3,5
blr
.align 4
5: /* Copy 1 byte. */
bf 31,0f
lbz 6,4(4)
stb 6,4(3)
0: /* Return DST + LEN pointer. */
ld 3,-16(1)
add 3,3,5
blr
/* Handle copies of 32+ bytes where DST is aligned (to quadword) but
SRC is not. Use aligned quadword loads from SRC, shifted to realign
the data, allowing for aligned DST stores. */
.align 4
L(copy_GE_32_unaligned):
clrldi 0,0,60 /* Number of bytes until the 1st
quadword. */
andi. 11,3,15 /* Check alignment of DST (against
quadwords). */
srdi 9,5,4 /* Number of full quadwords remaining. */
beq L(copy_GE_32_unaligned_cont)
/* SRC is not quadword aligned, get it aligned. */
mtcrf 0x01,0
subf 31,0,5
/* Vector instructions work best when proper alignment (16-bytes)
is present. Move 0~15 bytes as needed to get DST quadword-aligned. */
1: /* Copy 1 byte. */
bf 31,2f
lbz 6,0(12)
addi 12,12,1
stb 6,0(3)
addi 3,3,1
2: /* Copy 2 bytes. */
bf 30,4f
lhz 6,0(12)
addi 12,12,2
sth 6,0(3)
addi 3,3,2
4: /* Copy 4 bytes. */
bf 29,8f
lwz 6,0(12)
addi 12,12,4
stw 6,0(3)
addi 3,3,4
8: /* Copy 8 bytes. */
bf 28,0f
ld 6,0(12)
addi 12,12,8
std 6,0(3)
addi 3,3,8
0:
clrldi 10,12,60 /* Check alignment of SRC. */
srdi 9,31,4 /* Number of full quadwords remaining. */
/* The proper alignment is present, it is OK to copy the bytes now. */
L(copy_GE_32_unaligned_cont):
/* Setup two indexes to speed up the indexed vector operations. */
clrldi 11,31,60
li 6,16 /* Index for 16-bytes offsets. */
li 7,32 /* Index for 32-bytes offsets. */
cmpldi cr1,11,0
srdi 8,31,5 /* Setup the loop counter. */
mr 10,3
mr 11,12
mtcrf 0x01,9
cmpldi cr6,9,1
#ifdef __LITTLE_ENDIAN__
lvsr 5,0,12
#else
lvsl 5,0,12
#endif
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lvx 3,0,12
bf 31,L(setup_unaligned_loop)
/* Copy another 16 bytes to align to 32-bytes due to the loop . */
lvx 4,12,6
#ifdef __LITTLE_ENDIAN__
vperm 6,4,3,5
#else
vperm 6,3,4,5
#endif
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addi 11,12,16
addi 10,3,16
stvx 6,0,3
vor 3,4,4
L(setup_unaligned_loop):
mtctr 8
ble cr6,L(end_unaligned_loop)
/* Copy 32 bytes at a time using vector instructions. */
.align 4
L(unaligned_loop):
/* Note: vr6/vr10 may contain data that was already copied,
but in order to get proper alignment, we may have to copy
some portions again. This is faster than having unaligned
vector instructions though. */
lvx 4,11,6 /* vr4 = r11+16. */
#ifdef __LITTLE_ENDIAN__
vperm 6,4,3,5
#else
vperm 6,3,4,5
#endif
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lvx 3,11,7 /* vr3 = r11+32. */
#ifdef __LITTLE_ENDIAN__
vperm 10,3,4,5
#else
vperm 10,4,3,5
#endif
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addi 11,11,32
stvx 6,0,10
stvx 10,10,6
addi 10,10,32
bdnz L(unaligned_loop)
.align 4
L(end_unaligned_loop):
/* Check for tail bytes. */
rldicr 0,31,0,59
mtcrf 0x01,31
beq cr1,0f
add 3,3,0
add 12,12,0
/* We have 1~15 tail bytes to copy, and DST is quadword aligned. */
8: /* Copy 8 bytes. */
bf 28,4f
lwz 6,0(12)
lwz 7,4(12)
addi 12,12,8
stw 6,0(3)
stw 7,4(3)
addi 3,3,8
4: /* Copy 4 bytes. */
bf 29,2f
lwz 6,0(12)
addi 12,12,4
stw 6,0(3)
addi 3,3,4
2: /* Copy 2~3 bytes. */
bf 30,1f
lhz 6,0(12)
addi 12,12,2
sth 6,0(3)
addi 3,3,2
1: /* Copy 1 byte. */
bf 31,0f
lbz 6,0(12)
stb 6,0(3)
0: /* Return DST + LEN pointer. */
ld 31,-8(1)
ld 3,-16(1)
add 3,3,5
blr
END_GEN_TB (MEMPCPY,TB_TOCLESS)
libc_hidden_def (__mempcpy)
weak_alias (__mempcpy, mempcpy)
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libc_hidden_builtin_def (mempcpy)