2017-01-01 00:14:16 +00:00
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/* Copyright (C) 2012-2017 Free Software Foundation, Inc.
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2013-01-16 13:03:43 +00:00
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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2016-05-12 15:41:00 +00:00
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#include <sysdep.h>
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2013-01-16 13:03:43 +00:00
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/* Assumptions:
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*
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2016-05-12 15:41:00 +00:00
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* ARMv8-a, AArch64, unaligned accesses
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2013-01-16 13:03:43 +00:00
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*
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*/
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2016-05-12 15:41:00 +00:00
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#define dstin x0
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#define val x1
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#define valw w1
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#define count x2
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#define dst x3
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#define dstend x4
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#define tmp1 x5
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#define tmp1w w5
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#define tmp2 x6
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#define tmp2w w6
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#define zva_len x7
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#define zva_lenw w7
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2013-01-16 13:03:43 +00:00
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ENTRY_ALIGN (__memset, 6)
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Partial ILP32 support for aarch64.
* sysdeps/aarch64/crti.S: Add include of sysdep.h.
(call_weak_fn): Use PTR_REG to get correct reg name in ILP32.
* sysdeps/aarch64/dl-irel.h: Add include of sysdep.h.
(elf_irela): Use AARCH64_R macro to get correct relocation in ILP32.
* sysdeps/aarch64/dl-machine.h: Add include of sysdep.h.
(elf_machine_load_address, RTLD_START, RTLD_START_1, RTLD_START,
elf_machine_type_class, ELF_MACHINE_JMP_SLOT, elf_machine_rela,
elf_machine_lazy_rel): Add ifdef's for ILP32 support.
* sysdeps/aarch64/dl-tlsdesc.S (_dl_tlsdesc_return,
_dl_tlsdesc_return_lazy, _dl_tlsdesc_dynamic,
_dl_tlsdesc_resolve_hold): Extend pointers in ILP32, use PTR_REG
to get correct reg name for ILP32.
* sysdeps/aarch64/dl-trampoline.S (ip01): New Macro.
(RELA_SIZE): New Macro.
(_dl_runtime_resolve, _dl_runtime_profile): Use new macros and PTR_REG
to support ILP32.
* sysdeps/aarch64/jmpbuf-unwind.h (_JMPBUF_CFA_UNWINDS_ADJ): Add
cast for ILP32 mode.
* sysdeps/aarch64/memcmp.S (memcmp): Extend arg pointers for ILP32 mode.
* sysdeps/aarch64/memcpy.S (memmove, memcpy): Ditto.
* sysdeps/aarch64/memset.S (__memset): Ditto.
* sysdeps/aarch64/strchr.S (strchr): Ditto.
* sysdeps/aarch64/strchrnul.S (__strchrnul): Ditto.
* sysdeps/aarch64/strcmp.S (strcmp): Ditto.
* sysdeps/aarch64/strcpy.S (strcpy): Ditto.
* sysdeps/aarch64/strlen.S (__strlen): Ditto.
* sysdeps/aarch64/strncmp.S (strncmp): Ditto.
* sysdeps/aarch64/strnlen.S (strnlen): Ditto.
* sysdeps/aarch64/strrchr.S (strrchr): Ditto.
* sysdeps/unix/sysv/linux/aarch64/clone.S: Ditto.
* sysdeps/unix/sysv/linux/aarch64/setcontext.S (__setcontext): Ditto.
* sysdeps/unix/sysv/linux/aarch64/swapcontext.S (__swapcontext): Ditto.
* sysdeps/aarch64/__longjmp.S (__longjmp): Extend pointers in ILP32,
change PTR_MANGLE call to use register numbers instead of names.
* sysdeps/unix/sysv/linux/aarch64/getcontext.S (__getcontext): Ditto.
* sysdeps/aarch64/setjmp.S (__sigsetjmp): Extend arg pointers for
ILP32 mode, change PTR_MANGLE calls to use register numbers.
* sysdeps/aarch64/start.S (_start): Ditto.
* sysdeps/aarch64/nptl/bits/pthreadtypes.h
(__PTHREAD_RWLOCK_INT_FLAGS_SHARED): New define.
(__SIZEOF_PTHREAD_ATTR_T, __SIZEOF_PTHREAD_MUTEX_T,
__SIZEOF_PTHREAD_MUTEXATTR_T, __SIZEOF_PTHREAD_COND_T,
__SIZEOF_PTHREAD_COND_COMPAT_T, __SIZEOF_PTHREAD_CONDATTR_T,
__SIZEOF_PTHREAD_RWLOCK_T, __SIZEOF_PTHREAD_RWLOCKATTR_T,
__SIZEOF_PTHREAD_BARRIER_T, __SIZEOF_PTHREAD_BARRIERATTR_T):
Make defined values dependent on __ILP32__.
* sysdeps/aarch64/nptl/bits/semaphore.h (__SIZEOF_SEM_T): Change define.
(sem_t): Change __align type.
* sysdeps/aarch64/sysdep.h (AARCH64_R, PTR_REG, PTR_LOG_SIZE, DELOUSE,
PTR_SIZE): New Macros.
(LDST_PCREL, LDST_GLOBAL) Update to use PTR_REG.
* sysdeps/unix/sysv/linux/aarch64/bits/fcntl.h (O_LARGEFILE):
Set when in ILP32 mode.
(F_GETLK64, F_SETLK64, F_SETLKW64): Only set in LP64 mode.
* sysdeps/unix/sysv/linux/aarch64/dl-cache.h (DL_CACHE_DEFAULT_ID):
Set elf flags for ILP32.
(add_system_dir): Set ILP32 library directories.
* sysdeps/unix/sysv/linux/aarch64/init-first.c
(_libc_vdso_platform_setup): Set minimum kernel version for ILP32.
* sysdeps/unix/sysv/linux/aarch64/ldconfig.h
(SYSDEP_KNOWN_INTERPRETER_NAMES): Add ILP32 names.
* sysdeps/unix/sysv/linux/aarch64/sigcontextinfo.h (GET_PC, SET_PC):
New Macros.
* sysdeps/unix/sysv/linux/aarch64/sysdep.h: Handle ILP32 pointers.
2016-11-28 17:01:23 +00:00
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DELOUSE (0)
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DELOUSE (2)
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2016-05-12 15:41:00 +00:00
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dup v0.16B, valw
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add dstend, dstin, count
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cmp count, 96
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b.hi L(set_long)
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cmp count, 16
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b.hs L(set_medium)
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mov val, v0.D[0]
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/* Set 0..15 bytes. */
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tbz count, 3, 1f
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str val, [dstin]
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str val, [dstend, -8]
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ret
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nop
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1: tbz count, 2, 2f
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str valw, [dstin]
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str valw, [dstend, -4]
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ret
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2: cbz count, 3f
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strb valw, [dstin]
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tbz count, 1, 3f
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strh valw, [dstend, -2]
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3: ret
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/* Set 17..96 bytes. */
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L(set_medium):
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str q0, [dstin]
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tbnz count, 6, L(set96)
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str q0, [dstend, -16]
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tbz count, 5, 1f
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str q0, [dstin, 16]
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str q0, [dstend, -32]
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1: ret
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.p2align 4
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/* Set 64..96 bytes. Write 64 bytes from the start and
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32 bytes from the end. */
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L(set96):
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str q0, [dstin, 16]
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stp q0, q0, [dstin, 32]
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stp q0, q0, [dstend, -32]
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ret
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.p2align 3
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nop
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L(set_long):
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and valw, valw, 255
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bic dst, dstin, 15
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str q0, [dstin]
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cmp count, 256
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ccmp valw, 0, 0, cs
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b.eq L(try_zva)
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L(no_zva):
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sub count, dstend, dst /* Count is 16 too large. */
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add dst, dst, 16
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sub count, count, 64 + 16 /* Adjust count and bias for loop. */
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1: stp q0, q0, [dst], 64
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stp q0, q0, [dst, -32]
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L(tail64):
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subs count, count, 64
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b.hi 1b
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2: stp q0, q0, [dstend, -64]
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stp q0, q0, [dstend, -32]
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ret
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.p2align 3
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L(try_zva):
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2013-01-16 13:03:43 +00:00
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mrs tmp1, dczid_el0
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2016-05-12 15:41:00 +00:00
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tbnz tmp1w, 4, L(no_zva)
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and tmp1w, tmp1w, 15
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cmp tmp1w, 4 /* ZVA size is 64 bytes. */
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b.ne L(zva_128)
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/* Write the first and last 64 byte aligned block using stp rather
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than using DC ZVA. This is faster on some cores.
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*/
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L(zva_64):
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str q0, [dst, 16]
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stp q0, q0, [dst, 32]
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bic dst, dst, 63
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stp q0, q0, [dst, 64]
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stp q0, q0, [dst, 96]
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sub count, dstend, dst /* Count is now 128 too large. */
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sub count, count, 128+64+64 /* Adjust count and bias for loop. */
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add dst, dst, 128
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nop
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1: dc zva, dst
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add dst, dst, 64
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subs count, count, 64
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b.hi 1b
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stp q0, q0, [dst, 0]
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stp q0, q0, [dst, 32]
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stp q0, q0, [dstend, -64]
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stp q0, q0, [dstend, -32]
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ret
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.p2align 3
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L(zva_128):
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cmp tmp1w, 5 /* ZVA size is 128 bytes. */
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b.ne L(zva_other)
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str q0, [dst, 16]
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stp q0, q0, [dst, 32]
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stp q0, q0, [dst, 64]
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stp q0, q0, [dst, 96]
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bic dst, dst, 127
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sub count, dstend, dst /* Count is now 128 too large. */
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sub count, count, 128+128 /* Adjust count and bias for loop. */
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add dst, dst, 128
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1: dc zva, dst
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add dst, dst, 128
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subs count, count, 128
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b.hi 1b
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stp q0, q0, [dstend, -128]
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stp q0, q0, [dstend, -96]
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stp q0, q0, [dstend, -64]
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stp q0, q0, [dstend, -32]
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ret
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L(zva_other):
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mov tmp2w, 4
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lsl zva_lenw, tmp2w, tmp1w
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add tmp1, zva_len, 64 /* Max alignment bytes written. */
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cmp count, tmp1
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blo L(no_zva)
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sub tmp2, zva_len, 1
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add tmp1, dst, zva_len
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add dst, dst, 16
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subs count, tmp1, dst /* Actual alignment bytes to write. */
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bic tmp1, tmp1, tmp2 /* Aligned dc zva start address. */
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beq 2f
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1: stp q0, q0, [dst], 64
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stp q0, q0, [dst, -32]
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subs count, count, 64
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b.hi 1b
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2: mov dst, tmp1
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sub count, dstend, tmp1 /* Remaining bytes to write. */
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subs count, count, zva_len
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b.lo 4f
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3: dc zva, dst
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add dst, dst, zva_len
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subs count, count, zva_len
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b.hs 3b
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4: add count, count, zva_len
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b L(tail64)
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2013-01-16 13:03:43 +00:00
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END (__memset)
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weak_alias (__memset, memset)
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libc_hidden_builtin_def (memset)
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