2014-03-07 12:09:47 +00:00
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/* Optimized strncat implementation for PowerPC64/POWER7.
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Copyright (C) 2014 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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/* The algorithm is as follows for aligned memory access :
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if address of s2 is divisible by 0x7UL,
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perform aligned doubleword catenation
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else
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perform unaligned catenation
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The aligned comparison are made using cmpb instructions. */
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/* char* [r3] strncat (const char *s1 [r3],
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const char *s2 [r4],
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size_t size [r5]) */
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#include <sysdep.h>
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#ifndef STRNCAT
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# undef strncat
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# define STRNCAT strncat
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#endif
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#ifndef STRLEN
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2014-04-08 22:25:14 +00:00
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/* For builds with no IFUNC support, local calls should be made to internal
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GLIBC symbol (created by libc_hidden_builtin_def). */
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2014-06-06 14:37:07 +00:00
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# ifdef SHARED
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# define STRLEN __GI_strlen
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# else
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# define STRLEN strlen
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# endif
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2014-03-07 12:09:47 +00:00
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#endif
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#define FRAMESIZE (FRAME_MIN_SIZE+32)
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.machine power7
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EALIGN(STRNCAT, 4, 0)
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CALL_MCOUNT 3
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mflr r0 /* Load link register LR to r0. */
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/* We shall use r29, r30 and r31 non volatile register for retention.
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Save all the callee registers in the GPR save area. */
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std r29, -24(r1) /* Save callers register r29. */
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std r30, -16(r1) /* Save callers register r30. */
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std r31, -8(r1) /* Save callers register r31. */
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std r0, 16(r1) /* Store the link register. */
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stdu r1, -FRAMESIZE(r1) /* Create the stack frame. */
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/* Improve performance with CPU pre-fetch. */
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dcbt 0, r3 /* Pre-fetch str to avoid cache
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miss. */
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dcbt 0, r4 /* Pre-fetch accept to avoid cache
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miss. */
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mr. r29, r5 /* Save "n" in r29. */
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mr r30, r3 /* Save "s1" in r30 from r3. */
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beq cr0,L(done)
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mr r31, r4 /* Save "s2" in r31 from r4. */
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bl STRLEN /* Call optimized strlen on s1; goto
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end of s1. */
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nop
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cmpldi cr7, r29, 7 /* If s2 is <=7 process
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byte-by-byte. */
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add r3, r30, r3 /* Grab the last character of s1. */
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bgt cr7,L(alignment) /* Process by aligned strings. */
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cmpldi cr7, r29, 3 /* If n is >= 4, we can
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byte-unroll. */
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addi r9, r3, -1 /* Make "s1" point before next
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character, increment when read. */
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bgt cr7, L(bytes_unroll) /* Process each byte. */
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L(byte_by_byte):
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lbz r10, 0(r31)
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addi r8, r9, 1
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cmpdi cr7, r10, 0 /* Check for NULL in "s2". */
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stb r10, 1(r9)
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beq cr7, L(done)
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add r9, r9, r29
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subf r9, r8, r9
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addi r9, r9, 1
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mtctr r9
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b L(branch2)
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.p2align 4
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L(branch1):
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lbzu r10, 1(r31)
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cmpdi cr7, r10, 0
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stbu r10, 1(r8)
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beq cr7,L(done)
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L(branch2):
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mr r9, r8
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bdnz L(branch1)
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beq cr7,L(done)
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L(nullTerminate):
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li r10, 0 /* Load NULL for termination. */
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stb r10, 1(r9) /* Append or terminate s1 with
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NULL. */
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.p2align 4 /* A small section here. */
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L(done): /* We return now. */
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addi r1, r1, FRAMESIZE /* Restore stack pointer. */
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mr r3, r30 /* Set the return value length of
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string. */
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ld r0, 16(r1) /* Read the saved link register. */
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ld r29, -24(r1) /* Restore save register r29. */
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ld r30, -16(r1) /* Restore save register r30. */
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ld r31, -8(r1) /* Restore save register r31. */
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mtlr r0 /* Restore link register. */
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blr /* Branch to link register. */
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.p2align 4
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L(alignment):
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rldicl. r9, r31, 0, 61 /* Check if s2 is 8byte aligned */
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beq cr0,L(dwordAligned)
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.p2align 4
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/* Unaligned bytes in string, so process byte by byte.
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POWER7 has performance gains over loop unroll. */
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L(bytes_unroll):
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addi r9, r3, -1
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srdi r10, r29, 2
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mtctr r10
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b L(L10)
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.p2align 4
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L(L44):
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lbz r10, 1(r31) /* Load byte. */
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cmpdi cr7, r10, 0 /* Compare ; if byte not zero,
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continue. */
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stb r10, 2(r9) /* Store byte */
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beq cr7, L(done)
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addi r31, r31, 4
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lbz r10, -2(r31) /* Perform loop unroll here on byte
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load and store. */
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cmpdi cr7, r10, 0
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stb r10, 3(r9)
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beq cr7, L(done)
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lbz r10, -1(r31) /* Loop unroll here. */
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cmpdi cr7, r10, 0
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stbu r10, 4(r9)
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beq cr7, L(done)
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bdz L(leftNbytes)
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L(L10):
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lbz r10, 0(r31) /* Loop unroll here. */
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cmpdi cr7, r10, 0
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stb r10, 1(r9)
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bne cr7,L(L44)
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b L(done)
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.p2align 4
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/* If s2 is double word aligned, we load and store double word. */
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L(dwordAligned):
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/* read, write 8 bytes at a time */
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srdi r8, r29, 3 /* Compute count for CTR to loop;
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count = n/8. */
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li r7, 0 /* Load r7 with NULL. */
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li r10, 0 /* Load r10 with MASK '0'. */
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mtctr r8 /* Move count to CTR. */
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L(loop8):
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ld r9, 0(r31) /* Read double word from s2. */
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cmpb r6, r9, r10 /* Compare bytes in s2 we read
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just now. */
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cmpdi r6, 0 /* If cmpb returned NULL,
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we continue. */
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bne+ L(a8)
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std r9, 0(r3) /* Append double word from s2
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with s1. */
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addi r3, r3, 8 /* Increment s1. */
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addi r31, r31, 8 /* Increment s2. */
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subi r29, r29, 8 /* Decrement count by 8. */
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bdnz L(loop8) /* Continue until "count" is
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non zero. */
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L(a8):
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cmpdi r29, 0 /* If "n" is already zero, we skip. */
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beq+ L(align8align)
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mtctr r29 /* Process left over bytes in "n". */
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L(unaligned0):
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lbz r9, 0(r31) /* Read a byte from s2. */
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cmpw r9, r7 /* If byte is NULL, we stop here . */
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beq+ L(align8align) /* Skip processing further if NULL. */
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stb r9, 0(r3) /* If not NULL, store byte into s1. */
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addi r3, r3, 1 /* Increment s1 by 1. */
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addi r31, r31, 1 /* Increment s2 by 1. */
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bdnz L(unaligned0) /* Decrement counter "n" and loop
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until non zero. */
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L(align8align):
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stb r7, 0(r3) /* Terminate s1 with NULL. */
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addi r1, r1, FRAMESIZE /* Restore stack pointer. */
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mr r3, r30 /* Set the return value, length of
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string. */
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ld r0, 16(r1) /* Read the saved link register. */
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ld r29, -24(r1) /* Restore save register r29. */
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ld r30, -16(r1) /* Restore save register r30. */
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ld r31, -8(r1) /* Restore save register r31. */
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mtlr r0 /* Restore link register. */
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blr /* Branch to link register */
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.p2align 4
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L(leftNbytes):
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rldicl. r29, r29, 0, 62 /* Check if n>0 and n < 4 bytes. */
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bne cr0,L(byte_by_byte) /* Process bytes one by one. */
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b L(nullTerminate) /* Now, finish catenation with
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NULL termination. */
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END(STRNCAT)
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