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137 lines
2.6 KiB
ArmAsm
137 lines
2.6 KiB
ArmAsm
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/* Pentium __mpn_add_n -- Add two limb vectors of the same length > 0 and store
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sum in a third limb vector.
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Copyright (C) 1992, 1994, 1995 Free Software Foundation, Inc.
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This file is part of the GNU MP Library.
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The GNU MP Library is free software; you can redistribute it and/or modify
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it under the terms of the GNU Library General Public License as published by
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the Free Software Foundation; either version 2 of the License, or (at your
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option) any later version.
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The GNU MP Library is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Library General Public
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License for more details.
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You should have received a copy of the GNU Library General Public License
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along with the GNU MP Library; see the file COPYING.LIB. If not, write to
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the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/*
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INPUT PARAMETERS
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res_ptr (sp + 4)
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s1_ptr (sp + 8)
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s2_ptr (sp + 12)
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size (sp + 16)
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*/
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#define r1 %eax
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#define r2 %edx
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#define src1 %esi
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#define src2 %ebp
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#define dst %edi
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#define x %ebx
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#include "sysdep.h"
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#include "asm-syntax.h"
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.text
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ALIGN (3)
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.globl C_SYMBOL_NAME(__mpn_add_n)
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C_SYMBOL_NAME(__mpn_add_n:)
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pushl %edi
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pushl %esi
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pushl %ebx
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pushl %ebp
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movl 20(%esp),dst /* res_ptr */
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movl 24(%esp),src1 /* s1_ptr */
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movl 28(%esp),src2 /* s2_ptr */
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movl 32(%esp),%ecx /* size */
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movl (src2),x
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decl %ecx
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movl %ecx,r2
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shrl $3,%ecx
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andl $7,r2
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testl %ecx,%ecx /* zero carry flag */
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jz Lend
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pushl r2
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ALIGN (3)
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Loop: movl 28(dst),%eax /* fetch destination cache line */
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leal 32(dst),dst
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L1: movl (src1),r1
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movl 4(src1),r2
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adcl x,r1
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movl 4(src2),x
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adcl x,r2
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movl 8(src2),x
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movl r1,-32(dst)
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movl r2,-28(dst)
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L2: movl 8(src1),r1
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movl 12(src1),r2
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adcl x,r1
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movl 12(src2),x
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adcl x,r2
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movl 16(src2),x
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movl r1,-24(dst)
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movl r2,-20(dst)
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L3: movl 16(src1),r1
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movl 20(src1),r2
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adcl x,r1
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movl 20(src2),x
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adcl x,r2
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movl 24(src2),x
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movl r1,-16(dst)
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movl r2,-12(dst)
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L4: movl 24(src1),r1
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movl 28(src1),r2
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adcl x,r1
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movl 28(src2),x
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adcl x,r2
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movl 32(src2),x
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movl r1,-8(dst)
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movl r2,-4(dst)
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leal 32(src1),src1
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leal 32(src2),src2
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decl %ecx
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jnz Loop
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popl r2
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Lend:
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decl r2 /* test r2 w/o clobbering carry */
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js Lend2
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incl r2
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Loop2:
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leal 4(dst),dst
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movl (src1),r1
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adcl x,r1
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movl 4(src2),x
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movl r1,-4(dst)
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leal 4(src1),src1
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leal 4(src2),src2
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decl r2
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jnz Loop2
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Lend2:
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movl (src1),r1
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adcl x,r1
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movl r1,(dst)
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sbbl %eax,%eax
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negl %eax
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popl %ebp
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popl %ebx
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popl %esi
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popl %edi
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ret
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