glibc/sysdeps/s390/fpu/fsetexcptflg.c

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/* Set floating-point environment exception handling.
Copyright (C) 2000-2015 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
Contributed by Denis Joseph Barrow (djbarrow@de.ibm.com).
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
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#include <fenv_libc.h>
#include <math.h>
#include <fpu_control.h>
int
fesetexceptflag (const fexcept_t *flagp, int excepts)
{
S390: Fix handling of DXC-byte in FPC-register. On s390, the DXC(data-exception-code)-byte in FPC(floating-point-control)- register contains a code of the last occured exception. If bits 6 and 7 of DXC-byte are zero, the bits 0-5 correspond to the ieee-exception flag bits. The current implementation always uses these bits as ieee-exception flag bits. fetestexcept() reports any exception after the first usage of a vector-instruction in a process, because it raises an "vector instruction exception" with DXC-code 0xFE. This patch fixes the handling of the DXC-byte. The DXC-Byte is only handled if bits 6 and 7 are zero. The #define _FPU_RESERVED is extended by the DXC-Byte. Otherwise the tests math/test-fpucw-static and math/test-fpucw-ieee-static fails, because DXC-Byte contains the vector instruction exception when reaching main(). This exception was triggered by strrchr() call in __init_misc(). __init_misc() is called after __setfpucw () in __libc_init_first(). The field __ieee_instruction_pointer in struct fenv_t is renamed to __unused because it is a relict from commit "Remove PTRACE_PEEKUSER" (87b9b50f0d4b92248905e95a06a13c513dc45e59) and isn´t used anymore. ChangeLog: [BZ #18610] * sysdeps/s390/fpu/bits/fenv.h (fenv_t): Rename __ieee_instruction_pointer to __unused. * sysdeps/s390/fpu/fesetenv.c (__fesetenv): Remove usage of __ieee_instruction_pointer. * sysdeps/s390/fpu/fclrexcpt.c (feclearexcept): Fix dxc-field handling. * sysdeps/s390/fpu/fgetexcptflg.c (fegetexceptflag): Likewise. * sysdeps/s390/fpu/fsetexcptflg.c (fesetexceptflag): Likewise. * sysdeps/s390/fpu/ftestexcept.c (fetestexcept): Likewise. * sysdeps/s390/fpu/fpu_control.h (_FPU_RESERVED): Mark dxc-field as reserved.
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fexcept_t temp, newexcepts;
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/* Get the current environment. We have to do this since we cannot
separately set the status word. */
_FPU_GETCW (temp);
/* Install the new exception bits in the Accrued Exception Byte. */
excepts = excepts & FE_ALL_EXCEPT;
S390: Fix handling of DXC-byte in FPC-register. On s390, the DXC(data-exception-code)-byte in FPC(floating-point-control)- register contains a code of the last occured exception. If bits 6 and 7 of DXC-byte are zero, the bits 0-5 correspond to the ieee-exception flag bits. The current implementation always uses these bits as ieee-exception flag bits. fetestexcept() reports any exception after the first usage of a vector-instruction in a process, because it raises an "vector instruction exception" with DXC-code 0xFE. This patch fixes the handling of the DXC-byte. The DXC-Byte is only handled if bits 6 and 7 are zero. The #define _FPU_RESERVED is extended by the DXC-Byte. Otherwise the tests math/test-fpucw-static and math/test-fpucw-ieee-static fails, because DXC-Byte contains the vector instruction exception when reaching main(). This exception was triggered by strrchr() call in __init_misc(). __init_misc() is called after __setfpucw () in __libc_init_first(). The field __ieee_instruction_pointer in struct fenv_t is renamed to __unused because it is a relict from commit "Remove PTRACE_PEEKUSER" (87b9b50f0d4b92248905e95a06a13c513dc45e59) and isn´t used anymore. ChangeLog: [BZ #18610] * sysdeps/s390/fpu/bits/fenv.h (fenv_t): Rename __ieee_instruction_pointer to __unused. * sysdeps/s390/fpu/fesetenv.c (__fesetenv): Remove usage of __ieee_instruction_pointer. * sysdeps/s390/fpu/fclrexcpt.c (feclearexcept): Fix dxc-field handling. * sysdeps/s390/fpu/fgetexcptflg.c (fegetexceptflag): Likewise. * sysdeps/s390/fpu/fsetexcptflg.c (fesetexceptflag): Likewise. * sysdeps/s390/fpu/ftestexcept.c (fetestexcept): Likewise. * sysdeps/s390/fpu/fpu_control.h (_FPU_RESERVED): Mark dxc-field as reserved.
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newexcepts = excepts << FPC_FLAGS_SHIFT;
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temp &= ~newexcepts;
S390: Fix handling of DXC-byte in FPC-register. On s390, the DXC(data-exception-code)-byte in FPC(floating-point-control)- register contains a code of the last occured exception. If bits 6 and 7 of DXC-byte are zero, the bits 0-5 correspond to the ieee-exception flag bits. The current implementation always uses these bits as ieee-exception flag bits. fetestexcept() reports any exception after the first usage of a vector-instruction in a process, because it raises an "vector instruction exception" with DXC-code 0xFE. This patch fixes the handling of the DXC-byte. The DXC-Byte is only handled if bits 6 and 7 are zero. The #define _FPU_RESERVED is extended by the DXC-Byte. Otherwise the tests math/test-fpucw-static and math/test-fpucw-ieee-static fails, because DXC-Byte contains the vector instruction exception when reaching main(). This exception was triggered by strrchr() call in __init_misc(). __init_misc() is called after __setfpucw () in __libc_init_first(). The field __ieee_instruction_pointer in struct fenv_t is renamed to __unused because it is a relict from commit "Remove PTRACE_PEEKUSER" (87b9b50f0d4b92248905e95a06a13c513dc45e59) and isn´t used anymore. ChangeLog: [BZ #18610] * sysdeps/s390/fpu/bits/fenv.h (fenv_t): Rename __ieee_instruction_pointer to __unused. * sysdeps/s390/fpu/fesetenv.c (__fesetenv): Remove usage of __ieee_instruction_pointer. * sysdeps/s390/fpu/fclrexcpt.c (feclearexcept): Fix dxc-field handling. * sysdeps/s390/fpu/fgetexcptflg.c (fegetexceptflag): Likewise. * sysdeps/s390/fpu/fsetexcptflg.c (fesetexceptflag): Likewise. * sysdeps/s390/fpu/ftestexcept.c (fetestexcept): Likewise. * sysdeps/s390/fpu/fpu_control.h (_FPU_RESERVED): Mark dxc-field as reserved.
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if ((temp & FPC_NOT_FPU_EXCEPTION) == 0)
/* Bits 6, 7 of dxc-byte are zero,
thus bits 0-5 of dxc-byte correspond to the flag-bits.
Clear given exceptions in dxc-field. */
temp &= ~(excepts << FPC_DXC_SHIFT);
/* Integrate dxc-byte of flagp into flags. The dxc-byte of flagp contains
either an ieee-exception or 0 (see fegetexceptflag). */
temp |= (*flagp | ((*flagp >> FPC_DXC_SHIFT) << FPC_FLAGS_SHIFT))
& newexcepts;
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/* Store the new status word (along with the rest of the environment.
Possibly new exceptions are set but they won't get executed unless
the next floating-point instruction. */
_FPU_SETCW (temp);
/* Success. */
return 0;
}