glibc/sysdeps/powerpc/fpu/fenv_private.h

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/* Private floating point rounding and exceptions handling. PowerPC version.
Copyright (C) 2013-2020 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library. If not, see
Prefer https to http for gnu.org and fsf.org URLs Also, change sources.redhat.com to sourceware.org. This patch was automatically generated by running the following shell script, which uses GNU sed, and which avoids modifying files imported from upstream: sed -ri ' s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g ' \ $(find $(git ls-files) -prune -type f \ ! -name '*.po' \ ! -name 'ChangeLog*' \ ! -path COPYING ! -path COPYING.LIB \ ! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \ ! -path manual/texinfo.tex ! -path scripts/config.guess \ ! -path scripts/config.sub ! -path scripts/install-sh \ ! -path scripts/mkinstalldirs ! -path scripts/move-if-change \ ! -path INSTALL ! -path locale/programs/charmap-kw.h \ ! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \ ! '(' -name configure \ -execdir test -f configure.ac -o -f configure.in ';' ')' \ ! '(' -name preconfigure \ -execdir test -f preconfigure.ac ';' ')' \ -print) and then by running 'make dist-prepare' to regenerate files built from the altered files, and then executing the following to cleanup: chmod a+x sysdeps/unix/sysv/linux/riscv/configure # Omit irrelevant whitespace and comment-only changes, # perhaps from a slightly-different Autoconf version. git checkout -f \ sysdeps/csky/configure \ sysdeps/hppa/configure \ sysdeps/riscv/configure \ sysdeps/unix/sysv/linux/csky/configure # Omit changes that caused a pre-commit check to fail like this: # remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines git checkout -f \ sysdeps/powerpc/powerpc64/ppc-mcount.S \ sysdeps/unix/sysv/linux/s390/s390-64/syscall.S # Omit change that caused a pre-commit check to fail like this: # remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
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<https://www.gnu.org/licenses/>. */
Split fenv_private.h out of math_private.h more consistently. On some architectures, the parts of math_private.h relating to the floating-point environment are in a separate file fenv_private.h included from math_private.h. As this is purely an architecture-specific convention used by several architectures, however, all such architectures still need their own math_private.h, even if it has nothing to do beyond #include <fenv_private.h> and peculiarity of including the i386 file directly instead of having a shared file in sysdeps/x86. This patch makes the fenv_private.h name an architecture-independent convention in glibc. The include of fenv_private.h from math_private.h becomes architecture-independent (until callers are updated to include fenv_private.h directly so the include from math_private.h is no longer needed). Some architecture math_private.h headers are removed if no longer needed, or renamed to fenv_private.h if all they define belongs in that header; architecture fenv_private.h headers now do require #include_next <fenv_private.h>. The i386 fenv_private.h file moves to sysdeps/x86/fpu/ to reflect how it is actually shared with x86_64. The generic math_private.h gets a new include of <stdbool.h>, as needed for bool in some prototypes in that header (previously that was indirectly included via include/fenv.h, which now only gets included too late in math_private.h, after those prototypes). Tested for x86_64 and x86, and tested with build-many-glibcs.py that installed stripped shared libraries are unchanged by the patch. * sysdeps/aarch64/fpu/fenv_private.h: New file. Based on .... * sysdeps/aarch64/fpu/math_private.h: ... this file. All contents moved to fenv_private.h except for ... (TOINT_INTRINSICS): Kept in math_private.h. (roundtoint): Likewise. (converttoint): Likewise. * sysdeps/arm/fenv_private.h: Change multiple-include guard to [ARM_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/arm/math_private.h: Remove. * sysdeps/generic/fenv_private.h: New file. Contents moved from .... * sysdeps/generic/math_private.h: ... this file. Include <stdbool.h>. Do not include <fenv.h> or <get-rounding-mode.h>. Include <fenv_private.h>. Remove functions and macros moved to fenv_private.h. * sysdeps/i386/fpu/math_private.h: Remove. * sysdeps/mips/math_private.h: Move to .... * sysdeps/mips/fpu/fenv_private.h: ... here. Change multiple-include guard to [MIPS_FENV_PRIVATE_H]. Remove [__mips_hard_float] conditional. Include next <fenv_private.h>. * sysdeps/powerpc/fpu/fenv_private.h: Change multiple-include guard to [POWERPC_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/powerpc/fpu/math_private.h: Do not include <fenv_private.h>. * sysdeps/riscv/rvf/math_private.h: Move to .... * sysdeps/riscv/rvf/fenv_private.h: ... here. Change multiple-include guard to [RISCV_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/sparc/fpu/fenv_private.h: Change multiple-include guard to [SPARC_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/sparc/fpu/math_private.h: Remove. * sysdeps/i386/fpu/fenv_private.h: Move to .... * sysdeps/x86/fpu/fenv_private.h: ... here. Change multiple-include guard to [X86_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/x86_64/fpu/math_private.h: Do not include <sysdeps/i386/fpu/fenv_private.h>.
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#ifndef POWERPC_FENV_PRIVATE_H
#define POWERPC_FENV_PRIVATE_H 1
#include <fenv.h>
#include <fenv_libc.h>
#include <fpu_control.h>
#ifdef _ARCH_PWR8
/* There is no performance advantage to non-stop mode. */
/* The odd syntax here is to innocuously reference the given variables
to prevent warnings about unused variables. */
#define __TEST_AND_BEGIN_NON_STOP(old, new) do {} while ((old) * (new) * 0 != 0)
#define __TEST_AND_END_NON_STOP(old, new) do {} while ((old) * (new) * 0 != 0)
#else
#define __TEST_AND_BEGIN_NON_STOP __TEST_AND_ENTER_NON_STOP
#define __TEST_AND_END_NON_STOP __TEST_AND_EXIT_NON_STOP
#endif
static __always_inline void
libc_feholdexcept_setround_ppc (fenv_t *envp, int r)
{
fenv_union_t old, new;
old.fenv = *envp = fegetenv_register ();
__TEST_AND_BEGIN_NON_STOP (old.l, 0ULL);
/* Clear everything and set the rounding mode. */
new.l = r;
fesetenv_register (new.fenv);
}
static __always_inline unsigned long long
__libc_femergeenv_ppc (const fenv_t *envp, unsigned long long old_mask,
unsigned long long new_mask)
{
fenv_union_t old, new;
new.fenv = *envp;
old.fenv = fegetenv_register ();
/* Merge bits while masking unwanted bits from new and old env. */
new.l = (old.l & old_mask) | (new.l & new_mask);
__TEST_AND_END_NON_STOP (old.l, new.l);
__TEST_AND_BEGIN_NON_STOP (old.l, new.l);
/* If requesting to keep status, replace control, and merge exceptions,
and exceptions haven't changed, we can just set new control instead
of the whole FPSCR. */
if ((old_mask & (FPSCR_CONTROL_MASK|FPSCR_STATUS_MASK|FPSCR_EXCEPTIONS_MASK))
== (FPSCR_STATUS_MASK|FPSCR_EXCEPTIONS_MASK) &&
(new_mask & (FPSCR_CONTROL_MASK|FPSCR_STATUS_MASK|FPSCR_EXCEPTIONS_MASK))
== (FPSCR_CONTROL_MASK|FPSCR_EXCEPTIONS_MASK) &&
(old.l & FPSCR_EXCEPTIONS_MASK) == (new.l & FPSCR_EXCEPTIONS_MASK))
{
fesetenv_control (new.fenv);
}
else
/* Atomically enable and raise (if appropriate) exceptions set in `new'. */
fesetenv_register (new.fenv);
return old.l;
}
static __always_inline void
libc_fesetenv_ppc (const fenv_t *envp)
{
/* Replace the entire environment. */
__libc_femergeenv_ppc (envp, 0LL, -1LL);
}
static __always_inline void
libc_feresetround_ppc (fenv_t *envp)
{
[powerpc] SET_RESTORE_ROUND improvements SET_RESTORE_ROUND uses libc_feholdsetround_ppc_ctx and libc_feresetround_ppc_ctx to bracket a block of code where the floating point rounding mode must be set to a certain value. For the *prologue*, libc_feholdsetround_ppc_ctx is used and performs: 1. Read/save FPSCR. 2. Create new value for FPSCR with new rounding mode and enables cleared. 3. If new value is different than current value, a. If transitioning from a state where some exceptions enabled, enter "ignore exceptions / non-stop" mode. b. Write new value to FPSCR. c. Put a mark on the wall indicating the FPSCR was changed. (1) uses the 'mffs' instruction. On POWER9, the lighter weight 'mffsl' instruction can be used, but it doesn't return all of the bits in the FPSCR. fegetenv_status uses 'mffsl' on POWER9, 'mffs' otherwise, and can thus be used instead of fegetenv_register. (3b) uses 'mtfsf 0b11111111' to write the entire FPSCR, so it must instead use 'mtfsf 0b00000011' to write just the enables and the mode, because some of the rest of the bits are not valid if 'mffsl' was used. fesetenv_mode uses 'mtfsf 0b00000011' on POWER9, 'mtfsf 0b11111111' otherwise. For the *epilogue*, libc_feresetround_ppc_ctx checks the mark on the wall, then calls libc_feresetround_ppc, which just calls __libc_femergeenv_ppc with parameters such that it performs: 1. Retreive saved value of FPSCR, saved in prologue above. 2. Read FPSCR. 3. Create new value of FPSCR where: - Summary bits and exception indicators = current OR saved. - Rounding mode and enables = saved. - Status bits = current. 4. If transitioning from some exceptions enabled to none, enter "ignore exceptions / non-stop" mode. 5. If transitioning from no exceptions enabled to some, enter "catch exceptions" mode. 6. Write new value to FPSCR. The summary bits are hardwired to the exception indicators, so there is no need to restore any saved summary bits. The exception indicator bits, which are sticky and remain set unless explicitly cleared, would only need to be restored if the code block might explicitly clear any of them. This is certainly not expected. So, the only bits that need to be restored are the enables and the mode. If it is the case that only those bits are to be restored, there is no need to read the FPSCR. Steps (2) and (3) are unnecessary, and step (6) only needs to write the bits being restored. We know we are transitioning out of "ignore exceptions" mode, so step (4) is unnecessary, and in step (6), we only need to check the state we are entering.
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fenv_union_t new = { .fenv = *envp };
fegetenv_and_set_rn (new.l & FPSCR_RN_MASK);
}
static __always_inline int
libc_feupdateenv_test_ppc (fenv_t *envp, int ex)
{
return __libc_femergeenv_ppc (envp, ~FPSCR_CONTROL_MASK,
~FPSCR_STATUS_MASK) & ex;
}
static __always_inline void
libc_feupdateenv_ppc (fenv_t *e)
{
libc_feupdateenv_test_ppc (e, 0);
}
#define libc_feholdexceptf libc_feholdexcept_ppc
#define libc_feholdexcept libc_feholdexcept_ppc
#define libc_feholdexcept_setroundf libc_feholdexcept_setround_ppc
#define libc_feholdexcept_setround libc_feholdexcept_setround_ppc
#define libc_fetestexceptf libc_fetestexcept_ppc
#define libc_fetestexcept libc_fetestexcept_ppc
#define libc_fesetroundf libc_fesetround_ppc
#define libc_fesetround libc_fesetround_ppc
#define libc_fesetenvf libc_fesetenv_ppc
#define libc_fesetenv libc_fesetenv_ppc
#define libc_feupdateenv_testf libc_feupdateenv_test_ppc
#define libc_feupdateenv_test libc_feupdateenv_test_ppc
#define libc_feupdateenvf libc_feupdateenv_ppc
#define libc_feupdateenv libc_feupdateenv_ppc
#define libc_feholdsetroundf libc_feholdsetround_ppc
#define libc_feholdsetround libc_feholdsetround_ppc
#define libc_feresetroundf libc_feresetround_ppc
#define libc_feresetround libc_feresetround_ppc
/* We have support for rounding mode context. */
#define HAVE_RM_CTX 1
static __always_inline void
libc_feholdsetround_ppc_ctx (struct rm_ctx *ctx, int r)
{
fenv_union_t old;
ctx->env = old.fenv = fegetenv_and_set_rn (r);
ctx->updated_status = (r != (old.l & FPSCR_RN_MASK));
[powerpc] SET_RESTORE_ROUND improvements SET_RESTORE_ROUND uses libc_feholdsetround_ppc_ctx and libc_feresetround_ppc_ctx to bracket a block of code where the floating point rounding mode must be set to a certain value. For the *prologue*, libc_feholdsetround_ppc_ctx is used and performs: 1. Read/save FPSCR. 2. Create new value for FPSCR with new rounding mode and enables cleared. 3. If new value is different than current value, a. If transitioning from a state where some exceptions enabled, enter "ignore exceptions / non-stop" mode. b. Write new value to FPSCR. c. Put a mark on the wall indicating the FPSCR was changed. (1) uses the 'mffs' instruction. On POWER9, the lighter weight 'mffsl' instruction can be used, but it doesn't return all of the bits in the FPSCR. fegetenv_status uses 'mffsl' on POWER9, 'mffs' otherwise, and can thus be used instead of fegetenv_register. (3b) uses 'mtfsf 0b11111111' to write the entire FPSCR, so it must instead use 'mtfsf 0b00000011' to write just the enables and the mode, because some of the rest of the bits are not valid if 'mffsl' was used. fesetenv_mode uses 'mtfsf 0b00000011' on POWER9, 'mtfsf 0b11111111' otherwise. For the *epilogue*, libc_feresetround_ppc_ctx checks the mark on the wall, then calls libc_feresetround_ppc, which just calls __libc_femergeenv_ppc with parameters such that it performs: 1. Retreive saved value of FPSCR, saved in prologue above. 2. Read FPSCR. 3. Create new value of FPSCR where: - Summary bits and exception indicators = current OR saved. - Rounding mode and enables = saved. - Status bits = current. 4. If transitioning from some exceptions enabled to none, enter "ignore exceptions / non-stop" mode. 5. If transitioning from no exceptions enabled to some, enter "catch exceptions" mode. 6. Write new value to FPSCR. The summary bits are hardwired to the exception indicators, so there is no need to restore any saved summary bits. The exception indicator bits, which are sticky and remain set unless explicitly cleared, would only need to be restored if the code block might explicitly clear any of them. This is certainly not expected. So, the only bits that need to be restored are the enables and the mode. If it is the case that only those bits are to be restored, there is no need to read the FPSCR. Steps (2) and (3) are unnecessary, and step (6) only needs to write the bits being restored. We know we are transitioning out of "ignore exceptions" mode, so step (4) is unnecessary, and in step (6), we only need to check the state we are entering.
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}
static __always_inline void
libc_feholdsetround_noex_ppc_ctx (struct rm_ctx *ctx, int r)
{
fenv_union_t old, new;
old.fenv = fegetenv_register ();
[powerpc] SET_RESTORE_ROUND improvements SET_RESTORE_ROUND uses libc_feholdsetround_ppc_ctx and libc_feresetround_ppc_ctx to bracket a block of code where the floating point rounding mode must be set to a certain value. For the *prologue*, libc_feholdsetround_ppc_ctx is used and performs: 1. Read/save FPSCR. 2. Create new value for FPSCR with new rounding mode and enables cleared. 3. If new value is different than current value, a. If transitioning from a state where some exceptions enabled, enter "ignore exceptions / non-stop" mode. b. Write new value to FPSCR. c. Put a mark on the wall indicating the FPSCR was changed. (1) uses the 'mffs' instruction. On POWER9, the lighter weight 'mffsl' instruction can be used, but it doesn't return all of the bits in the FPSCR. fegetenv_status uses 'mffsl' on POWER9, 'mffs' otherwise, and can thus be used instead of fegetenv_register. (3b) uses 'mtfsf 0b11111111' to write the entire FPSCR, so it must instead use 'mtfsf 0b00000011' to write just the enables and the mode, because some of the rest of the bits are not valid if 'mffsl' was used. fesetenv_mode uses 'mtfsf 0b00000011' on POWER9, 'mtfsf 0b11111111' otherwise. For the *epilogue*, libc_feresetround_ppc_ctx checks the mark on the wall, then calls libc_feresetround_ppc, which just calls __libc_femergeenv_ppc with parameters such that it performs: 1. Retreive saved value of FPSCR, saved in prologue above. 2. Read FPSCR. 3. Create new value of FPSCR where: - Summary bits and exception indicators = current OR saved. - Rounding mode and enables = saved. - Status bits = current. 4. If transitioning from some exceptions enabled to none, enter "ignore exceptions / non-stop" mode. 5. If transitioning from no exceptions enabled to some, enter "catch exceptions" mode. 6. Write new value to FPSCR. The summary bits are hardwired to the exception indicators, so there is no need to restore any saved summary bits. The exception indicator bits, which are sticky and remain set unless explicitly cleared, would only need to be restored if the code block might explicitly clear any of them. This is certainly not expected. So, the only bits that need to be restored are the enables and the mode. If it is the case that only those bits are to be restored, there is no need to read the FPSCR. Steps (2) and (3) are unnecessary, and step (6) only needs to write the bits being restored. We know we are transitioning out of "ignore exceptions" mode, so step (4) is unnecessary, and in step (6), we only need to check the state we are entering.
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new.l = (old.l & ~(FPSCR_ENABLES_MASK|FPSCR_RN_MASK)) | r;
ctx->env = old.fenv;
if (__glibc_unlikely (new.l != old.l))
{
__TEST_AND_BEGIN_NON_STOP (old.l, 0ULL);
fesetenv_control (new.fenv);
ctx->updated_status = true;
}
else
ctx->updated_status = false;
}
static __always_inline void
libc_fesetenv_ppc_ctx (struct rm_ctx *ctx)
{
libc_fesetenv_ppc (&ctx->env);
}
static __always_inline void
libc_feupdateenv_ppc_ctx (struct rm_ctx *ctx)
{
if (__glibc_unlikely (ctx->updated_status))
libc_feresetround_ppc (&ctx->env);
}
static __always_inline void
libc_feresetround_ppc_ctx (struct rm_ctx *ctx)
{
if (__glibc_unlikely (ctx->updated_status))
libc_feresetround_ppc (&ctx->env);
}
#define libc_fesetenv_ctx libc_fesetenv_ppc_ctx
#define libc_fesetenvf_ctx libc_fesetenv_ppc_ctx
#define libc_fesetenvl_ctx libc_fesetenv_ppc_ctx
#define libc_feholdsetround_ctx libc_feholdsetround_ppc_ctx
#define libc_feholdsetroundf_ctx libc_feholdsetround_ppc_ctx
#define libc_feholdsetroundl_ctx libc_feholdsetround_ppc_ctx
[powerpc] SET_RESTORE_ROUND improvements SET_RESTORE_ROUND uses libc_feholdsetround_ppc_ctx and libc_feresetround_ppc_ctx to bracket a block of code where the floating point rounding mode must be set to a certain value. For the *prologue*, libc_feholdsetround_ppc_ctx is used and performs: 1. Read/save FPSCR. 2. Create new value for FPSCR with new rounding mode and enables cleared. 3. If new value is different than current value, a. If transitioning from a state where some exceptions enabled, enter "ignore exceptions / non-stop" mode. b. Write new value to FPSCR. c. Put a mark on the wall indicating the FPSCR was changed. (1) uses the 'mffs' instruction. On POWER9, the lighter weight 'mffsl' instruction can be used, but it doesn't return all of the bits in the FPSCR. fegetenv_status uses 'mffsl' on POWER9, 'mffs' otherwise, and can thus be used instead of fegetenv_register. (3b) uses 'mtfsf 0b11111111' to write the entire FPSCR, so it must instead use 'mtfsf 0b00000011' to write just the enables and the mode, because some of the rest of the bits are not valid if 'mffsl' was used. fesetenv_mode uses 'mtfsf 0b00000011' on POWER9, 'mtfsf 0b11111111' otherwise. For the *epilogue*, libc_feresetround_ppc_ctx checks the mark on the wall, then calls libc_feresetround_ppc, which just calls __libc_femergeenv_ppc with parameters such that it performs: 1. Retreive saved value of FPSCR, saved in prologue above. 2. Read FPSCR. 3. Create new value of FPSCR where: - Summary bits and exception indicators = current OR saved. - Rounding mode and enables = saved. - Status bits = current. 4. If transitioning from some exceptions enabled to none, enter "ignore exceptions / non-stop" mode. 5. If transitioning from no exceptions enabled to some, enter "catch exceptions" mode. 6. Write new value to FPSCR. The summary bits are hardwired to the exception indicators, so there is no need to restore any saved summary bits. The exception indicator bits, which are sticky and remain set unless explicitly cleared, would only need to be restored if the code block might explicitly clear any of them. This is certainly not expected. So, the only bits that need to be restored are the enables and the mode. If it is the case that only those bits are to be restored, there is no need to read the FPSCR. Steps (2) and (3) are unnecessary, and step (6) only needs to write the bits being restored. We know we are transitioning out of "ignore exceptions" mode, so step (4) is unnecessary, and in step (6), we only need to check the state we are entering.
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#define libc_feholdsetround_noex_ctx libc_feholdsetround_noex_ppc_ctx
#define libc_feholdsetround_noexf_ctx libc_feholdsetround_noex_ppc_ctx
#define libc_feholdsetround_noexl_ctx libc_feholdsetround_noex_ppc_ctx
#define libc_feresetround_ctx libc_feresetround_ppc_ctx
#define libc_feresetroundf_ctx libc_feresetround_ppc_ctx
#define libc_feresetroundl_ctx libc_feresetround_ppc_ctx
#define libc_feupdateenv_ctx libc_feupdateenv_ppc_ctx
#define libc_feupdateenvf_ctx libc_feupdateenv_ppc_ctx
#define libc_feupdateenvl_ctx libc_feupdateenv_ppc_ctx
Split fenv_private.h out of math_private.h more consistently. On some architectures, the parts of math_private.h relating to the floating-point environment are in a separate file fenv_private.h included from math_private.h. As this is purely an architecture-specific convention used by several architectures, however, all such architectures still need their own math_private.h, even if it has nothing to do beyond #include <fenv_private.h> and peculiarity of including the i386 file directly instead of having a shared file in sysdeps/x86. This patch makes the fenv_private.h name an architecture-independent convention in glibc. The include of fenv_private.h from math_private.h becomes architecture-independent (until callers are updated to include fenv_private.h directly so the include from math_private.h is no longer needed). Some architecture math_private.h headers are removed if no longer needed, or renamed to fenv_private.h if all they define belongs in that header; architecture fenv_private.h headers now do require #include_next <fenv_private.h>. The i386 fenv_private.h file moves to sysdeps/x86/fpu/ to reflect how it is actually shared with x86_64. The generic math_private.h gets a new include of <stdbool.h>, as needed for bool in some prototypes in that header (previously that was indirectly included via include/fenv.h, which now only gets included too late in math_private.h, after those prototypes). Tested for x86_64 and x86, and tested with build-many-glibcs.py that installed stripped shared libraries are unchanged by the patch. * sysdeps/aarch64/fpu/fenv_private.h: New file. Based on .... * sysdeps/aarch64/fpu/math_private.h: ... this file. All contents moved to fenv_private.h except for ... (TOINT_INTRINSICS): Kept in math_private.h. (roundtoint): Likewise. (converttoint): Likewise. * sysdeps/arm/fenv_private.h: Change multiple-include guard to [ARM_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/arm/math_private.h: Remove. * sysdeps/generic/fenv_private.h: New file. Contents moved from .... * sysdeps/generic/math_private.h: ... this file. Include <stdbool.h>. Do not include <fenv.h> or <get-rounding-mode.h>. Include <fenv_private.h>. Remove functions and macros moved to fenv_private.h. * sysdeps/i386/fpu/math_private.h: Remove. * sysdeps/mips/math_private.h: Move to .... * sysdeps/mips/fpu/fenv_private.h: ... here. Change multiple-include guard to [MIPS_FENV_PRIVATE_H]. Remove [__mips_hard_float] conditional. Include next <fenv_private.h>. * sysdeps/powerpc/fpu/fenv_private.h: Change multiple-include guard to [POWERPC_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/powerpc/fpu/math_private.h: Do not include <fenv_private.h>. * sysdeps/riscv/rvf/math_private.h: Move to .... * sysdeps/riscv/rvf/fenv_private.h: ... here. Change multiple-include guard to [RISCV_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/sparc/fpu/fenv_private.h: Change multiple-include guard to [SPARC_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/sparc/fpu/math_private.h: Remove. * sysdeps/i386/fpu/fenv_private.h: Move to .... * sysdeps/x86/fpu/fenv_private.h: ... here. Change multiple-include guard to [X86_FENV_PRIVATE_H]. Include next <fenv_private.h>. * sysdeps/x86_64/fpu/math_private.h: Do not include <sysdeps/i386/fpu/fenv_private.h>.
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#include_next <fenv_private.h>
#endif