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Add x86 32-bit SSE4.2 string functions.
This patch adds 32bit SSE4.2 string functions. It uses -16L instead of 0xfffffffffffffff0L, which works for both 32bit and 64bit long. Tested on 32bit Core i7 and Core 2.
This commit is contained in:
H.J. Lu
Ulrich Drepper
parent
421665c40a
commit
02cea47161
24
ChangeLog
24
ChangeLog
@ -1,3 +1,27 @@
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2009-08-03 H.J. Lu <hongjiu.lu@intel.com>
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* sysdeps/i386/i686/multiarch/Makefile [subdir=string]
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(sysdep_routines): Add strcspn-c, strpbrk-c, strspn-c, strstr-c, and
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strcasestr-c.
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(CFLAGS-strcspn-c.c): Define.
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(CFLAGS-strpbrk-c.c): Define.
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(CFLAGS-strspn-c.c): Define.
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(CFLAGS-strstr.c): Define.
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(CFLAGS-strcasestr.c): Define.
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* sysdeps/i386/i686/multiarch/strcspn-c.c: New file.
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* sysdeps/i386/i686/multiarch/strcspn.S: New file.
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* sysdeps/i386/i686/multiarch/strpbrk-c.c: New file.
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* sysdeps/i386/i686/multiarch/strpbrk.S: New file.
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* sysdeps/i386/i686/multiarch/strspn-c.c: New file.
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* sysdeps/i386/i686/multiarch/strspn.S: New file.
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* sysdeps/i386/i686/multiarch/strstr-c.c: New file.
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* sysdeps/i386/i686/multiarch/strstr.c: New file.
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* sysdeps/i386/i686/multiarch/strcasestr-c.c: New file.
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* sysdeps/i386/i686/multiarch/strcasestr.c: New file.
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* sysdeps/x86_64/multiarch/strcspn-c.c (STRCSPN_SSE42): Use
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-16L instead of 0xfffffffffffffff0L.
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* sysdeps/x86_64/multiarch/strspn-c.c (__strspn_sse42): Likewise.
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2009-08-02 Ulrich Drepper <drepper@redhat.com>
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* sysdeps/i386/configure.in: Add test for <cpuid.h>.
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@ -2,3 +2,14 @@ ifeq ($(subdir),csu)
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aux += init-arch
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gen-as-const-headers += ifunc-defines.sym
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endif
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ifeq ($(subdir),string)
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ifeq (yes,$(config-cflags-sse4))
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sysdep_routines += strcspn-c strpbrk-c strspn-c strstr-c strcasestr-c
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CFLAGS-strcspn-c.c += -msse4
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CFLAGS-strpbrk-c.c += -msse4
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CFLAGS-strspn-c.c += -msse4
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CFLAGS-strstr.c += -msse4
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CFLAGS-strcasestr.c += -msse4
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endif
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endif
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2
sysdeps/i386/i686/multiarch/strcasestr-c.c
Normal file
2
sysdeps/i386/i686/multiarch/strcasestr-c.c
Normal file
@ -0,0 +1,2 @@
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#define __strcasestr_sse2 __strcasestr_ia32
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#include <sysdeps/x86_64/multiarch/strcasestr-c.c>
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1
sysdeps/i386/i686/multiarch/strcasestr.c
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1
sysdeps/i386/i686/multiarch/strcasestr.c
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@ -0,0 +1 @@
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#include <sysdeps/x86_64/multiarch/strcasestr.c>
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2
sysdeps/i386/i686/multiarch/strcspn-c.c
Normal file
2
sysdeps/i386/i686/multiarch/strcspn-c.c
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@ -0,0 +1,2 @@
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#define __strcspn_sse2 __strcspn_ia32
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#include <sysdeps/x86_64/multiarch/strcspn-c.c>
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99
sysdeps/i386/i686/multiarch/strcspn.S
Normal file
99
sysdeps/i386/i686/multiarch/strcspn.S
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@ -0,0 +1,99 @@
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/* Multiple versions of strcspn
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Copyright (C) 2009 Free Software Foundation, Inc.
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Contributed by Intel Corporation.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <config.h>
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#ifdef HAVE_SSE4_SUPPORT
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#include <sysdep.h>
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#include <ifunc-defines.h>
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#ifdef USE_AS_STRPBRK
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#define STRCSPN_SSE42 __strpbrk_sse42
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#define STRCSPN_IA32 __strpbrk_ia32
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#define __GI_STRCSPN __GI_strpbrk
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#else
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#ifndef STRCSPN
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#define STRCSPN strcspn
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#define STRCSPN_SSE42 __strcspn_sse42
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#define STRCSPN_IA32 __strcspn_ia32
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#define __GI_STRCSPN __GI_strcspn
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#endif
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#endif
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/* Define multiple versions only for the definition in libc. Don't
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define multiple versions for strpbrk in static library since we
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need strpbrk before the initialization happened. */
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#if (defined SHARED || !defined USE_AS_STRPBRK) && !defined NOT_IN_libc
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.section .gnu.linkonce.t.__i686.get_pc_thunk.bx,"ax",@progbits
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.globl __i686.get_pc_thunk.bx
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.hidden __i686.get_pc_thunk.bx
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.p2align 4
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.type __i686.get_pc_thunk.bx,@function
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__i686.get_pc_thunk.bx:
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movl (%esp), %ebx
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ret
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.text
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ENTRY(STRCSPN)
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.type STRCSPN, @gnu_indirect_function
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pushl %ebx
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cfi_adjust_cfa_offset (4)
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cfi_rel_offset (ebx, 0)
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call __i686.get_pc_thunk.bx
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addl $_GLOBAL_OFFSET_TABLE_, %ebx
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cmpl $0, KIND_OFFSET+__cpu_features@GOTOFF(%ebx)
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jne 1f
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call __init_cpu_features
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1: leal STRCSPN_IA32@GOTOFF(%ebx), %eax
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testl $(1<<20), CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET+__cpu_features@GOTOFF(%ebx)
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jz 2f
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leal STRCSPN_SSE42@GOTOFF(%ebx), %eax
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2: popl %ebx
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cfi_adjust_cfa_offset (-4);
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cfi_restore (ebx)
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ret
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END(STRCSPN)
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# undef ENTRY
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# define ENTRY(name) \
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.type STRCSPN_IA32, @function; \
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.globl STRCSPN_IA32; \
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.p2align 4; \
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STRCSPN_IA32: cfi_startproc; \
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CALL_MCOUNT
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# undef END
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# define END(name) \
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cfi_endproc; .size STRCSPN_IA32, .-STRCSPN_IA32
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# undef libc_hidden_builtin_def
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/* It doesn't make sense to send libc-internal strcspn calls through a PLT.
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The speedup we get from using SSE4.2 instruction is likely eaten away
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by the indirect call in the PLT. */
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# define libc_hidden_builtin_def(name) \
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.globl __GI_STRCSPN; __GI_STRCSPN = STRCSPN_IA32
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#endif
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#endif /* HAVE_SSE4_SUPPORT */
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#ifdef USE_AS_STRPBRK
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#include "../../strpbrk.S"
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#else
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#include "../../strcspn.S"
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#endif
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2
sysdeps/i386/i686/multiarch/strpbrk-c.c
Normal file
2
sysdeps/i386/i686/multiarch/strpbrk-c.c
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@ -0,0 +1,2 @@
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#define __strpbrk_sse2 __strpbrk_ia32
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#include <sysdeps/x86_64/multiarch/strpbrk-c.c>
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3
sysdeps/i386/i686/multiarch/strpbrk.S
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3
sysdeps/i386/i686/multiarch/strpbrk.S
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@ -0,0 +1,3 @@
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#define STRCSPN strpbrk
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#define USE_AS_STRPBRK
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#include "strcspn.S"
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2
sysdeps/i386/i686/multiarch/strspn-c.c
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2
sysdeps/i386/i686/multiarch/strspn-c.c
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@ -0,0 +1,2 @@
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#define __strspn_sse2 __strspn_ia32
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#include <sysdeps/x86_64/multiarch/strspn-c.c>
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80
sysdeps/i386/i686/multiarch/strspn.S
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80
sysdeps/i386/i686/multiarch/strspn.S
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@ -0,0 +1,80 @@
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/* Multiple versions of strspn
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Copyright (C) 2009 Free Software Foundation, Inc.
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Contributed by Intel Corporation.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <config.h>
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#ifdef HAVE_SSE4_SUPPORT
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#include <sysdep.h>
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#include <ifunc-defines.h>
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/* Define multiple versions only for the definition in libc. */
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#ifndef NOT_IN_libc
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.section .gnu.linkonce.t.__i686.get_pc_thunk.bx,"ax",@progbits
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.globl __i686.get_pc_thunk.bx
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.hidden __i686.get_pc_thunk.bx
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.p2align 4
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.type __i686.get_pc_thunk.bx,@function
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__i686.get_pc_thunk.bx:
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movl (%esp), %ebx
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ret
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.text
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ENTRY(strspn)
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.type strspn, @gnu_indirect_function
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pushl %ebx
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cfi_adjust_cfa_offset (4)
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cfi_rel_offset (ebx, 0)
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call __i686.get_pc_thunk.bx
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addl $_GLOBAL_OFFSET_TABLE_, %ebx
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cmpl $0, KIND_OFFSET+__cpu_features@GOTOFF(%ebx)
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jne 1f
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call __init_cpu_features
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1: leal __strspn_ia32@GOTOFF(%ebx), %eax
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testl $(1<<20), CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET+__cpu_features@GOTOFF(%ebx)
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jz 2f
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leal __strspn_sse42@GOTOFF(%ebx), %eax
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2: popl %ebx
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cfi_adjust_cfa_offset (-4);
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cfi_restore (ebx)
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ret
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END(strspn)
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# undef ENTRY
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# define ENTRY(name) \
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.type __strspn_ia32, @function; \
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.globl __strspn_ia32; \
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.p2align 4
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__strspn_ia32: cfi_startproc; \
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CALL_MCOUNT
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# undef END
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# define END(name) \
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cfi_endproc; .size __strspn_ia32, .-__strspn_ia32
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# undef libc_hidden_builtin_def
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/* It doesn't make sense to send libc-internal strspn calls through a PLT.
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The speedup we get from using SSE4.2 instruction is likely eaten away
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by the indirect call in the PLT. */
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# define libc_hidden_builtin_def(name) \
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.globl __GI_strspn; __GI_strspn = __strspn_ia32
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#endif
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#endif /* HAVE_SSE4_SUPPORT */
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#include "../../strspn.S"
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12
sysdeps/i386/i686/multiarch/strstr-c.c
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12
sysdeps/i386/i686/multiarch/strstr-c.c
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#include "init-arch.h"
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#define STRSTR __strstr_ia32
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#undef libc_hidden_builtin_def
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#define libc_hidden_builtin_def(name) \
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__hidden_ver1 (__strstr_ia32, __GI_strstr, __strstr_ia32);
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#include "string/strstr.c"
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extern char *__strstr_sse42 (const char *, const char *);
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libc_ifunc (strstr, HAS_SSE4_2 ? __strstr_sse42 : __strstr_ia32);
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1
sysdeps/i386/i686/multiarch/strstr.c
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1
sysdeps/i386/i686/multiarch/strstr.c
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@ -0,0 +1 @@
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#include <sysdeps/x86_64/multiarch/strstr.c>
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@ -90,7 +90,7 @@ STRCSPN_SSE42 (const char *s, const char *a)
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if (offset != 0)
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{
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/* Load masks. */
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aligned = (const char *) ((size_t) a & 0xfffffffffffffff0L);
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aligned = (const char *) ((size_t) a & -16L);
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__m128i mask0 = _mm_load_si128 ((__m128i *) aligned);
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switch (offset)
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@ -229,7 +229,7 @@ STRCSPN_SSE42 (const char *s, const char *a)
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if (offset != 0)
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{
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/* Check partial string. */
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aligned = (const char *) ((size_t) s & 0xfffffffffffffff0L);
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aligned = (const char *) ((size_t) s & -16L);
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__m128i value = _mm_load_si128 ((__m128i *) aligned);
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switch (offset)
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@ -68,7 +68,7 @@ __strspn_sse42 (const char *s, const char *a)
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if (offset != 0)
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{
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/* Load masks. */
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aligned = (const char *) ((size_t) a & 0xfffffffffffffff0L);
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aligned = (const char *) ((size_t) a & -16L);
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__m128i mask0 = _mm_load_si128 ((__m128i *) aligned);
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switch (offset)
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@ -207,7 +207,7 @@ __strspn_sse42 (const char *s, const char *a)
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if (offset != 0)
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{
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/* Check partial string. */
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aligned = (const char *) ((size_t) s & 0xfffffffffffffff0L);
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aligned = (const char *) ((size_t) s & -16L);
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__m128i value = _mm_load_si128 ((__m128i *) aligned);
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switch (offset)
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