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Initial Enhanced REP MOVSB/STOSB (ERMS) support
The newer Intel processors support Enhanced REP MOVSB/STOSB (ERMS) which has a feature bit in CPUID. This patch adds the Enhanced REP MOVSB/STOSB (ERMS) bit to x86 cpu-features. * sysdeps/x86/cpu-features.h (bit_cpu_ERMS): New. (index_cpu_ERMS): Likewise. (reg_ERMS): Likewise.
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@ -1,3 +1,9 @@
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2016-03-28 H.J. Lu <hongjiu.lu@intel.com>
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* sysdeps/x86/cpu-features.h (bit_cpu_ERMS): New.
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(index_cpu_ERMS): Likewise.
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(reg_ERMS): Likewise.
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2016-03-28 Aurelien Jarno <aurelien@aurel32.net>
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* sysdeps/unix/sysv/linux/sys/personality.h (UNAME26, FDPIC_FUNCPTRS,
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@ -53,6 +53,7 @@
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#define bit_cpu_FMA4 (1 << 16)
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/* COMMON_CPUID_INDEX_7. */
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#define bit_cpu_ERMS (1 << 9)
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#define bit_cpu_RTM (1 << 11)
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#define bit_cpu_AVX2 (1 << 5)
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#define bit_cpu_AVX512F (1 << 16)
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@ -84,6 +85,7 @@
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# define index_cpu_SSE4_2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_cpu_AVX COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_cpu_AVX2 COMMON_CPUID_INDEX_7*CPUID_SIZE+CPUID_EBX_OFFSET
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# define index_cpu_ERMS COMMON_CPUID_INDEX_7*CPUID_SIZE+CPUID_EBX_OFFSET
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# define index_arch_Fast_Rep_String FEATURE_INDEX_1*FEATURE_SIZE
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# define index_arch_Fast_Copy_Backward FEATURE_INDEX_1*FEATURE_SIZE
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@ -228,6 +230,7 @@ extern const struct cpu_features *__get_cpu_features (void)
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# define index_cpu_AVX2 COMMON_CPUID_INDEX_7
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# define index_cpu_AVX512F COMMON_CPUID_INDEX_7
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# define index_cpu_AVX512DQ COMMON_CPUID_INDEX_7
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# define index_cpu_ERMS COMMON_CPUID_INDEX_7
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# define index_cpu_RTM COMMON_CPUID_INDEX_7
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# define index_cpu_FMA COMMON_CPUID_INDEX_1
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# define index_cpu_FMA4 COMMON_CPUID_INDEX_80000001
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@ -244,6 +247,7 @@ extern const struct cpu_features *__get_cpu_features (void)
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# define reg_AVX2 ebx
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# define reg_AVX512F ebx
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# define reg_AVX512DQ ebx
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# define reg_ERMS ebx
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# define reg_RTM ebx
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# define reg_FMA ecx
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# define reg_FMA4 ecx
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